5/40
M29W160ET, M29W160EB
SUMMARY DESCRIPTION
The M29W160E is a 16 Mbit (2Mb x8 or 1Mb x16)
non-volatile memory that can be read, erased and
reprogrammed. These operations can be per-
formed using a single low voltage (2.7 to 3.6V)
supply. On power-up the memory defaults to its
Read mode where it can be read in the same way
as a ROM or EPROM.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents.
The end of a program or erase operation can be
detected and any error conditions identified. The
command set required to control the memory is
consistent with JEDEC standards.
The blocks in the memory are asymmetrically ar-
ranged, see Figures 5 and 6, Block Addresses.
The first or last 64 KBytes have been divided into
four additional blocks. The 16 KByte Boot Block
can be used for small initialization code to start the
microprocessor, the two 8 KByte Parameter
Blocks can be used for parameter storage and the
remaining 32K is a small Main Block where the ap-
plication may be stored.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered TSOP48 (12 x 20mm) and
TFBGA48 (0.8mm pitch) packages. The memory
is supplied with all the bits erased (set to ’1’).
Figure 2. Logic Diagram
Table 1. Signal Names
AI06849B
20
A0-A19
W
DQ0-DQ14
VCC
M29W160ET
M29W160EB
E
VSS
15
G
RP
DQ15A–1
RB
BYTE
A0-A19
Address Inputs
DQ0-DQ7
Data Inputs/Outputs
DQ8-DQ14
Data Inputs/Outputs
DQ15A–1
Data Input/Output or Address Input
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset/Block Temporary Unprotect
RB
Ready/Busy Output
BYTE
Byte/Word Organization Select
V
CC
Supply Voltage
V
SS
Ground
NC
Not Connected Internally
DVD27
harman/kardon
52
Summary of Contents for DVD 27
Page 26: ...DVD27 harman kardon 26 ...
Page 27: ...DVD27 harman kardon 27 ...
Page 83: ...DVD27 harman kardon 83 ...
Page 84: ...DVD27 harman kardon 84 ...
Page 86: ...DVD27 harman kardon 86 ...
Page 87: ...DVD27 harman kardon 87 ...
Page 88: ...DVD27 harman kardon 88 ...
Page 89: ...DVD27 harman kardon 89 ...
Page 96: ...DVD27 harman kardon 96 ...
Page 97: ...DVD27 harman kardon 97 ...
Page 98: ...DVD27 harman kardon 98 ...
Page 99: ...DVD27 harman kardon 99 ...
Page 100: ...DVD27 harman kardon 100 ...
Page 101: ...DVD27 harman kardon 101 ...
Page 102: ...DVD27 harman kardon 102 ...
Page 103: ...DVD27 harman kardon 103 ...
Page 104: ...DVD27 harman kardon 104 ...
Page 105: ... 4 Mon Dec 26 10 52 04 2005 DVD27 harman kardon 105 ...
Page 106: ...h 3 Mon Dec 26 10 55 36 2005 DVD27 harman kardon 106 ...
Page 107: ...h 2 Mon Dec 26 10 56 46 2005 DVD27 harman kardon 107 ...
Page 108: ...sch 1 Thu Dec 29 14 10 12 2005 DVD27 harman kardon 108 ...
Page 109: ...MPS sch 1 Mon Dec 26 16 29 58 2005 DVD27 harman kardon 109 ...
Page 110: ...DVD27 harman kardon 110 ...