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MB9048
2
■
PIN DESCRIPTIONS
(IC72)
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP*
1
QFP*
2
80
82
X0
A
Oscillator pin
81
83
X1
A
Oscillator pin
78
80
X0A
A
32 kHz oscillator pin
77
79
X1A
A
32 kHz oscillator pin
75
77
RST
B
Reset input pin
83 to 90 85 to 92
P00 to P07
C
(CMOS)
This is a general purpose I/O port. A setting in the pull-up
resistance setting register (RDR0) can be used to apply pull-up
resistance (RD00-RD07
=
“1”) . (Disabled when pin is set for
output.)
AD00 to AD07
In multiplex mode, these pins function as the external address/
data bus low I/O pins.
D00 to D07
In non-multiplex mode, these pins function as the external data
bus low output pins.
91 to 98
93 to
100
P10 to P17
C
(CMOS)
This is a general purpose I/O port. A setting in the pull-up
resistance setting resister (RDR1) can be used to apply pull-up
resistance (RD10-RD17
=
“1”) . (Disabled when pin is set for
output.)
AD08 to AD15
In multiplex mode, these pins function as the external address/
data bus high I/O pins.
D08 to D15
In non-multiplex mode, these pins function as the external data
bus high output pins.
99,
100,
1,2
1 to 4
P20 to P23
E
(CMOS/H)
This is a general purpose I/O port. When the bits of external
address output control register (HACR) are set to "1" in external
bus mode, these pins function as general purpose I/O ports.
A16 to A19
When the bits of external address output control register (HACR)
are set to "0" in multiplex mode, these pins function as address
high output pins (A16-A19).
A16 to A19
When the bits of external address output control register (HACR)
are set to "0" in non-multiplex mode, these pins function as
address high output pins (A16-A19).
3 to 6
5 to 8
P24 to P27
E
(CMOS/H)
This is a general purpose I/O port. When the bits of external
address output control register (HACR) are set to "1" in external
bus mode, these pins function as general purpose I/O ports.
A20 to A23
When the bits of external address output control register (HACR)
are set to "0" in multiplex mode, these pins function as address
high output pins (A20-A23).
A20 to A23
When the bits of external address output control register (HACR)
are set to "0" in non-multiplex mode, these pins function as
address high output pins (A20-A23).
PPG0 to PPG3
PPG timer output pins.
AVR135
harman/kardon
83
Summary of Contents for AVR 135
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Page 81: ...System Block Diagram LC74763 74763M AVR135 harman kardon 81...
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