Grimm Audio CC1, Manual

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7. Specifications
The clock PLL is a hybrid analog / digital design, based on a discrete design ultra-
low jitter crystal oscillator. In master mode the oscillator is temperature compen-
sated. Local shunt regulators featuring 120 dB power supply rejection and a high
impedance supply path, thus all variations in load current are kept local to the
circuit: the power buss and ground carry only DC current.
Specifications
Word clock input impedance 75 Ohm.
Word clock input sensitivity better than 1Vpp.
Word clock output impedance 75 Ohm or 25 Ohm (‘low’) on selected channels.
Word clock output voltage, terminated 2.7 Vpp, unterminated 5.5 Vpp. DC coupled.
Latency word clock in - word clock out: adjusted to less than 50 ns, but may be
larger due to input clock jitter.
Internal intrinsic clock jitter 2,1 ps RMS (above 10 Hz).
Clock frequency master mode: 1, 2 or 4 times 44.1 or 48 kHz ± 10 PPM, 5 - 50 °C.
PLL performance (slave mode):
90 dB attenuation @ 10 Hz, improving at 60 dB/dec above that.
Pullability of clock frequency: ± 50 PPM (conform AES11 Grade 2).
Maximum ambient temperature for operation: 50 °C.
Life expectancy power supply electrolytics > 45.000 hours.
Power supply voltage range +/- 20%
Fuses:
120V (USA): fuse 500mA
100V (Japan): fuse 500mA
230V (EU):
fuse 250mA
Weight: 4 kg
Dimensions: 430 x 200 x 44 mm.
Power consumption: 15 W.
Wood type of front: Abachi.