2 Introduction
2.6 Development Board Description
DBUG391-1.0E
8(20)
2.6
Development Board Description
Table 2-1 Development Board Description
No.
Name
Functional Description
Technical Condition
1
FPGA
Core chip
–
2
Download
Support an USB interface;
Support JTAG,
AUTOBOOT
USB to JTAG chip integrated on board
3
Power Supply
3.3 V, 2.8V, 2.5V, 1.8V, and
1.2V output via LDO circuit
Input power: 5V
Provide power for FPGA, download circuit
and other circuits via 5V to 3.3 V circuit;
Provide power for FPC connector via 5V to
2.8V circuit;
Provide power for FPGA and FPC
connector via 5V to 2.5V circuit;
Provide power for FPGA via 5V to 1.8V
circuit;
Provide power for FPGA and FPC
connector via 5 V to 1.2 V circuit.
4
Dip switch
Select JTAG or USB
interface
1
5
6
LED
Test indicator, Power
indicator
Two test indicators, green;
One power indicator, green;
7
Crystal
Oscillator
Provide 27MHz clock for
FPGA
Package2520
8
Memory
FLASH
256K embedded Flash
64Mbit external SPI FLASH
9
HDMI TX
HDMI signal transmitted by
FPGA internal IP
One pair of clock and three pairs of data
10
Camera
Connected to external
camera
24Pin with 0.5mm pitch
11
Mic
Acquire audio data
2
12
Accelerometer
Acquire acceleration
information
1
13
Protection
USB interface: ESD
protection
USB interface with ESD protection: ±15kV
non-contact discharge and ± 8kV contact
discharge;