GOWIN DK-GoAI-GW2A55PBGA484 User Manual Download | Manualshive

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DK-GoAI-GW2A55PBGA484_V1.0

User Guide

DBUG378-1.0E, 08/19/2020

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Summary of Contents for DK-GoAI-GW2A55PBGA484

Page 1: ...DK GoAI GW2A55PBGA484_V1 0 User Guide DBUG378 1 0E 08 19 2020 ...

Page 2: ... identified as trademarks or service marks are the property of their respective holders as described at www gowinsemi com GOWINSEMI assumes no liability and provides no warranty either expressed or implied and is not responsible for any damage incurred to your hardware software data or property resulting from usage of the materials or intellectual property except as outlined in the GOWINSEMI Terms...

Page 3: ...Revision History Date Version Description 08 19 2020 1 0E Initial version published ...

Page 4: ...d Feedback 3 2 Introduction 4 2 1 Overview 4 2 2 Development Kit 5 2 3 PCB Components 6 2 4 System Block Diagram 7 2 5 Features 8 2 6 Development Board Description 9 3 Development Board Circuit 11 3 1 FPGA Module 11 3 2 Download 11 3 2 1 Overview 11 3 2 2 USB Download Circuit 12 3 2 3 Download Flow 12 3 2 4 Pinout 12 3 3 Power Supply 13 3 3 1 Overview 13 3 3 2 Power System Distribution 14 3 3 3 FP...

Page 5: ... 3 5 1 Overview 16 3 5 2 LED Circuit 17 3 5 3 Pinout 17 3 6 GPIO 18 3 6 1 Overview 18 3 6 2 Pinout 18 3 7 FPC Connector 18 3 7 1 Overview 18 3 7 2 FPC Circuit 19 3 7 3 Pinout 20 3 8 HDMI 21 3 8 1 Overview 21 3 8 2 HDMI Circuit 21 3 8 3 Pinout 22 3 9 Microphone Circuit 23 3 9 1 Pinout 23 4 Notes 24 5 Gowin Software 25 ...

Page 6: ... 2 2 A Development Kit 5 Figure 2 3 PCB Components 6 Figure 2 4 System Block Diagram 7 Figure 3 1 FPGA USB Download Diagram 12 Figure 3 2 Power System Distribution 14 Figure 3 3 Clock Reset 16 Figure 3 4 LED Circuit 17 Figure 3 5 FPC Circuit 19 Figure 3 6 HDMI Connection Diagram 21 Figure 3 7 Microphone Circuit 23 ...

Page 7: ... Development Board Description 9 Table 3 1 FPGA Download Pinout 12 Table 3 2 FPGA Power Pinout 15 Table 3 3 FPGA Clock and Reset Pinout 16 Table 3 4 LED Pinout 17 Table 3 5 GPIO Pinout 18 Table 3 6 FPC Pinout 20 Table 3 7 HDMI_TX Pinout 22 Table 3 8 HDMI_RX Pinout 22 Table 3 9 Microphone Pinout 23 ...

Page 8: ...tes for the use of the development board 4 An introduction to the usage of the FPGA development software 1 2 Supported Products The information in the guide applies to GW2A series of FPGA products GW2A 55 1 3 Related Documents You can find the related documents at www gowinsemi com 1 DS102 GW2A series of FPGA Products Data Sheet 2 UG111 GW2A series of FPGAProducts Package and Pinout Manual 3 UG113...

Page 9: ...S Configurable Logic Slice CRU Configurable Routing Unit LUT4 Four input Look up Tables LUT5 Five input Look up Tables LUT6 Six input Look up Tables LUT7 Seven input Look up Tables LUT8 Eight input Look up Tables REG Register ALU Arithmetic Logic Unit IOB Input Output Block S SRAM Shadow Static Random Access Memory B SRAM Block Static Random Access Memory SP Single Port SDP Semi Dual Port DP Dual ...

Page 10: ...5 Support and Feedback Gowin Semiconductor provides customers with comprehensive technical support If you have any questions comments or suggestions please feel free to contact us directly by the following ways Website www gowinsemi com E mail support gowinsemi com ...

Page 11: ...amily The GW2A series provide high performance DSP resources high speed LVDS interfaces and abundant BSRAM resources These embedded resources in combination with a streamlined FPGA architecture with 55nm process make the GW2AR series of FPGA products suitable for high speed and low cost applications The development board offers abundant external interfaces including dual channel microphone camera ...

Page 12: ...opment board kit includes the following items DK GoAI GW2A55PBGA484_V1 0 development board USB Cable 5V Adaptor Quick Start Guide Figure 2 2 A Development Kit 1 2 3 4 Gowin DK GoAI GW2A55PBGA484_V1 0 Development Board 5V Power Supply USB Mini B Download Cable Quick Start User Manual ...

Page 13: ...s Figure 2 3 PCB Components 5V Power Outlet Power Switch Flash HDMI RX GPIO LED Reset Key HyperRAM microphone right channel microphone left channel 3 3V 1 8V Power Supply 2 5V 1 2V Power Supply 2 8V Power Supply 1 0V Power Supply USB USB to JTAG Chip FPGA HDMI TX Camera ...

Page 14: ...2 4 System Block Diagram DBUG378 1 0E 7 25 2 4 System Block Diagram Figure 2 4 System Block Diagram MIPI USB HDMI TX camera 64Mbit HyperRAM 5V GW2A LV55PG484 Reset FT232HL HDMI RX 64Mbit Flash Microphone 6 LED 10 GPIO ...

Page 15: ...pacities of B SRAM FPGA Configuration Modes MSPI JTAG Clock resource 27MHz Clock Crystal Oscillator Key One reset key LED One 5V power indicator One DONE indicator Two HDMI hot plug indicators Six LEDs Memory 64Mbit external HyperRAM 64Mbit external SPI flash GPIO 8 extended I Os HDMI One HDMI TX Interface One HDMI RX Interface DC DC LDO Power 3 3 V 2 8V 2 5V 1 8V 1 2V and 1 0V supported ...

Page 16: ...era input via 5V to 1 2V circuit Provide power for FPGA via 2 8V to 1 0V circuit 4 Switch FPGA Power switch 1 5 Reset key FPGA reset 1 6 LED Test indicator hot plug indicator and power indicator Six test indicators Two hot plug indicators One DONE indicator One power indicator 7 Crystal Oscillator Provide 27MHz clock for FPGA Package2520 8 Memory Provide PSRAM and Flash 64Mbit external HyperRAM 64...

Page 17: ...tions Remarks protection HDMI interface with ESD protection anodes of power interface 2A self recovery fuses are connected at power input HDMI interface with ESD protection 15kV non contact discharge and 8kV contact discharge 13 Voltage Input Voltage 5V 14 Humidity 95 15 Temperature Operating range 40 85 ...

Page 18: ...11 GW2A series of FPGAProducts Package and Pinout Manual for more details 3 2 Download 3 2 1 Overview The development board provides an USB download interface The bitstream file can be downloaded to the internal SRAM or the external SPI flash as needed Note When downloaded to SRAM the bitstream file will be lost if the device is powered down and it will need to be downloaded again after power on I...

Page 19: ...SPI Download Mode Plug the USB cable to the USB interface J7 on the development board then power on Open the Programmer select External Flash mode and then select the bitstream file and FLASH you required Turn off the power after downloading Power on and then the device will import the bitstream file to SRAM from the external Flash 3 2 4 Pinout Table 3 1 FPGA Download Pinout Name Pin No BANK Descr...

Page 20: ...G378 1 0E 13 25 3 3 Power Supply 3 3 1 Overview DC5V is input by J6 The PAM2306AYPAA and TPS7A7001 power supply chip are used to step down voltage from 5V to 3 3V 2 8V 2 5V 1 8V 1 2V and 1 0V which can meet the power demands of the development board ...

Page 21: ... System Distribution DC5V input PAM2306AYPA DC DC 2 5V PAM2306AYPA DC DC 3 3V PAM2306AYPA DC DC 1 8V USB to JTAG FT2232 FPGA Flash 27Mhz clock reset LED GPIO FPGA Microphone HyperRAM HDMI FPC connector HDMI FPGA TPS7A7001 LDO 1 0V FPGA PAM2306AYPA DC DC 2 8V FPC connector PAM2306AYPA DC DC 1 2V FPC connector 2 8V ...

Page 22: ... 1 8V VCCO7 L6 D2 J2 7 I O Bank Voltage 2 5V VCCPLLL K7 N7 PLLL 1 0V VCCPLLR K16 N16 PLLR 1 0V VCCX U14 U9 F14 J6 F9 P17 P6 J17 Auxiliary voltage 3 3V VCC J7 M16 T7 L7 L16 H7 G9 T13 T14 G10 M7 G11 T16 G14 G13 G15 G16 P16 P6 H16 G7 G16 G8 R16 J16 T12 T11 R7 T15 T9 T8 T10 T16 Core voltage 1 0V 3 4 Clock Reset 3 4 1 Overview The development board provides a 27MHz crystal oscillator connected to the P...

Page 23: ...and Reset Pinout Name Pin No BANK Description I O Level F_CLK M19 2 27MHz crystal oscillator input 3 3V F_RST_N AA22 3 Reset Signal active low 3 3V 3 5 LED 3 5 1 Overview There are six LEDs on the development board and users can display the required status You can test the LEDs in the following ways When the FPGA corresponding pin output signal is logic low the LED is lit If the signal is high LED...

Page 24: ...ED4 AA22 LED5 AA21 VCC3P3 F_LED0 F_LED1 F_LED2 F_LED3 GW2A LV55PG484 LED6 AB22 F_LED4 LED7 AB21 F_LED5 3 5 3 Pinout Table 3 4 LED Pinout Name Pin No BANK Description I O Level F_LED1 Y22 3 LED2 3 3V F_LED2 Y21 3 LED3 3 3V F_LED3 AA22 3 LED4 3 3V F_LED4 AA21 3 LED5 3 3V F_LED5 AB22 3 LED6 3 3V F_LED6 AB21 3 LED7 3 3V ...

Page 25: ...Pinout Table 3 5 GPIO Pinout Name Pin No BANK I O Level F_GPIO0 T20 3 3 3V F_GPIO1 V22 3 3 3V F_GPIO2 T19 3 3 3V F_GPIO3 W22 3 3 3V F_GPIO4 U19 3 3 3V F_GPIO5 U20 3 3 3V F_GPIO6 U18 3 3 3V F_GPIO7 V20 3 3 3V 3 7 FPC Connector 3 7 1 Overview To facilitate you to input camera signals to FPGA 24PIN FPC connector FH12 24S 0 5SH is reserved on the development board ...

Page 26: ...5 3 7 2 FPC Circuit Figure 3 5 FPC Circuit FH12_24S_0 5SH U1 J1 GW2A LV55PG484 PIXDATA3 PIXDATA4 PIXDATA5 PIXDATA6 PIXDATA7 PIXDATA8 PIXDATA9 HREF VSYNC SCL AA3 AB3 AB4 AB6 AA6 AA7 AB8 AA8 AB11 AB7 PIXDATA2 PIXDATA1 PIXDATA0 AB5 AB2 AB1 SDA PIXCLK XCLK AA11 D11 AB9 ...

Page 27: ...ontal reference output 2 5V 10 SVDD Sensor array power 1 2V 11 DOVDD Digital image signal power 2 5V 12 PIXDATA9 AA7 5 Video output channel 9 2 5V 13 XCLK AB9 5 System clock input 2 5V 14 PIXDATA8 AB7 5 Video output channel 8 2 5V 15 GND GND 16 PIXDATA7 AA6 5 Video output channel 7 2 5V 17 PIXCLK D11 1 Pixel clock output 2 5V 18 PIXDATA6 AB6 5 Video output channel 6 2 5V 19 PIXDATA2 AB5 5 Video ou...

Page 28: ...ages to FPGA and FPAG to output images one HDMI RX interface and one HDMI TX interface are reserved 3 8 2 HDMI Circuit Figure 3 6 HDMI Connection Diagram HDMI_TX U1 J5 GW2A LV55PG484 HDMI_TXCP HDMI_TXCN HDMI_TX0P HDMI_TX0N HDMI_TX1P HDMI_TX1N HDMI_TX2P HDMI_TX2N HDMI_SCL HDMI_SDA R1 T1 F1 G1 J1 P1 N1 C4 D4 K1 ...

Page 29: ...MI_TX2P P1 7 TMDS data 2 2 5V HDMI_TX2N N1 7 TMDS data 2 2 5V HDMI_SCL C4 0 DDC clock line 3 3V HDMI_SDA D4 0 DDC data line 3 3V Table 3 8 HDMI_RX Pinout Name Pin No BANK Description I O Level HDMI_RXCP AB12 4 TMDS clock signal 2 5V HDMI_RXCN AA12 4 TMDS clock signal 2 5V HDMI_RX0P Y19 4 TMDS data 0 2 5V HDMI_RX0N Y18 4 TMDS data 0 2 5V HDMI_RX1P V17 4 TMDS data 1 2 5V HDMI_RX1N V18 4 TMDS data 1 ...

Page 30: ...t U1 R3 MSM261S40 30H0R 1 8V MIC_SD MIC_WS U1 U20 GW2A LV55PG484 T2 MIC_SCK MSM261S40 30H0R 1 8V U21 MIC_SD MIC_SCK MIC_WS L R L R 3 9 1 Pinout Table 3 9 Microphone Pinout Name Pin No BANK Description I O Level MIC_WS U1 6 I S serial data Select 1 8V MIC_SCK T2 6 Serial Data Clock 1 8V MIC_SD R3 6 Serial data output 1 8V ...

Page 31: ...l line is not connected to the GW2AR 55device 4 The PWDN interface of the camera is not connected to the GW2AR 55 device 5 The MODE mode cannot be changed due to MODE interface grounding 6 The 27MHz clock is provided to GW2AR 55 device and 12MHz clock is provided to the USB to JTAG chip FT232HL 7 Make sure that the development board is powered by a 5V adapter and if the voltage is above this value...

Page 32: ...5 Gowin Software DBUG378 1 0E 25 25 5Gowin Software See SUG100 Gowin Software User Guide for details ...

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