Global American 330827, User Manual

Page: 26 / 30

21
3.19 Watchdog Timer
Once the Enable cycle is active a Refresh cycle is requested before the
time-out period. This restarts counting of the WDT period. When the
time counting goes over the period preset of WDT, it will assume that
the program operation is abnormal. A system reset signal will restart
when such error happens.
The following sample programs show how to enable, disable and
refresh the watchdog timer:
.286
.MODEL SMALL
.DATA ;this is data area
x1 db '-------------------------------------------------------',0ah,0dh,'$'
copyright db '
',0ah,0dh,'$'
x2 db '-------------------------------------------------------',0ah,0dh,'$'
port
equ 02Eh ;W83627H Chipset port
datao equ 02Fh ;data port
.CODE
print macro buff
mov
dx,offset buff;
mov ah,09h
int 21h
endm
begin proc near
mov ax,@data
mov ds,ax
STI
; W83627H
mov dx,port ; Unlock registor
mov al,087H ;
out dx,al
jmp $+2
out dx,al
mov dx,port
;
mov al,07H ;
out dx,al
jmp $+2
mov
dx,datao ; set device 8
mov al,08H ;
out dx,al
jmp $+2
mov dx,port ; Watchdog IO function
mov al,030H ; registor
out dx,al
jmp $+2
mov dx,datao ; set 01h toactivate
mov al,01H ;
out dx,al