GigaDevice Semiconductor GD32F10 Series, User Manual

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GD32F10x User Manual
120
± 1%.
2 Reserved Must be kept at reset value.
1 IRC8MSTB Internal 8MHz RC oscillator stabilization flag
Set by hardware to indicate if the IRC8M oscillator is stable and ready for use.
0: IRC8M oscillator is not stable
1: IRC8M oscillator is stable
0 IRC8MEN Internal 8MHz RC oscillator enable
Set and reset by software. This bit cannot be reset if the IRC8M clock is used as the
system clock. Set by hardware when leaving Deep-sleep or Standby mode or the
HXTAL clock is stuck at a low or high state when CKMEN is set.
0: Internal 8 MHz RC oscillator disabled
1: Internal 8 MHz RC oscillator enabled
5.6.2.
Clock configuration register 0 (RCU_CFG0)
Address offset: 0x04
Reset value: 0x0000 0000
This register can be accessed by byte(8-bit), half-word(16-bit) and word(32-bit)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved PLLMF[4]
ADCPSC[
2]
CKOUT0SEL[3:0] USBFSPSC[1:0] PLLMF[3:0]
PREDV0
_LSB
PLLSEL
rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ADCPSC[1:0] APB2PSC[2:0] APB1PSC[2:0] AHBPSC[3:0] SCSS[1:0] SCS[1:0]
rw rw rw rw r rw
Bits Fields Descriptions
31:30 Reserved Must be kept at reset value.
29 PLLMF[4] Bit 4 of PLLMF
see bits 21:18 of RCU_CFG0
28 ADCPSC[2] Bit 2 of ADCPSC
see bits 15:14 of RCU_CFG0
27:24 CKOUT0SEL[3:0] CKOUT0 clock source selection
Set and reset by software.
00xx: No clock selected
0100: System clock selected
0101: Internel 8MHz RC Oscillator clock selected
0110: External high speed oscillator clock selected
0111: (CK_PLL / 2) clock selected