User Manual
GD32107C-EVAL
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15
4.7
I2S
Figure 7. Schematic diagram of I2S function
LRCK
1
DATA
2
BCK
3
PD
4
AGND
5
HGND
6
Vcom
7
HoutR
8
SCKI
16
HoutL
9
AIN
10
Vhp
11
VCC
12
MD
13
MC
14
MS
15
U10
PCM1770 PM
NRST
GND
+3V3
E6
16V/10uF,AVX
5
4
3
2
1
J3
HeadPhone
E7
10V/220uF,AVX
E8
10V/220uF,AVX
R43
16R
R44
16R
C45
50V/0.22uF
C46
50V/0.22uF
GND
C43
50V/0.1uF
C44
50V/0.1uF
E4
16V/10uF,AVX
E5
16V/10uF,AV
GND
GND
PB12
PB15
PB13
I2S_WS
I2S_DIN
I2S_CK
MDIN
MCLK
MSEL
I2S_WS
I2S_DIN
I2S_CK
PA4
I2S_MCK
MSEL
MCLK
MDIN
1
2
3
JP18
HEADER 3
1
2
3
JP19
HEADER 3
RMII_TXD0
RMII_TXD1
Short JP18(1,2) and JP19(1,2) for Etherner function
SPI1_MOSI
PA7
Short JP18(2,3) and JP19(2,3) for I2S function
I2S_MCK
PC6
SPI1_SCK
4.8
I2C
Figure 8. Schematic diagram of I2C function
A0
1
A1
2
A2
3
GND
4
SDA
5
SCL
6
WP
7
VCC
8
U4
AT24C02C-SSHM-T
+3V3
GND
R10
4.7K
Ω
R11
4.7K
Ω
I2C1_SCL
I2C1_SDA
I2C
C26
50V/0.1uF
GND
PB7
PB6
PB6 is an AFIO, please refer to CAN Schematic for right config
