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10) GPIO (GPIO Header)
This header allows for control of high and low signals.
Pin No.
Definition
Pin No.
Definition
1
IO_GP70
6
IO_GP75
2
IO_GP71
7
IO_GP76
3
IO_GP72
8
IO_GP77
4
IO_GP73
9
GP_IN_OUT
5
IO_GP74
10
GND
10 9
2 1
11) LVDS (LVDS Header)
LVDS stands for Low-voltage differential signaling, which uses high-speed analog circuit techniques to
provide multigigabit data transfers on copper interconnects and is a generic interface standard for high-
speed data transmission.
Pin No.
Definition
Pin No.
Definition
1
LCD_VCC
21
-RXE0_C
2
LCD_VCC
22
+RXE0_C
3
VCC3
23
GND
4
NC
24
-RXE1_C
5
NC
25
+RXE1_C
6
-RXO0_C
26
GND
7
+RXO0_C
27
-RXE2_C
8
GND
28
+RXE2_C
9
-RXO1_C
29
CABLE_DET
(Note)
10
+RXO1_C
30
-RXE3_C
11
GND
31
+RXE3_C
12
-RXO2_C
32
GND
13
+RXO2_C
33
-RXECLKE_C
14
GND
34
+RXECLKE_C
15
-RXO3_C
35
GND
16
+RXO3_C
36
SC_BKLT_EN
17
GND
37
SC_BKLT_CTL
18
-RXECLKO_C
38
FPD_PWR
19
+RXECLKO_C
39
FPD_PWR
20
GND
40
FPD_PWR
2
1
40
39
(Note) Connects to Pin 35 and the ground pin of the LVDS.
