Gemalto Cinterion ELS31T-J, Hardware Interface Description, Page: 38 / 102

Cinterion
®
LTE Terminals Hardware Interface Description
3.6 GPIO Interface
47

ELSxT_HID_v04 2018-09-04
Confidential / Preliminary
Page 38 of 102
3.6.4 SPI Interface
For ELS61T-X Terminals four dedicated pins of the GPIO connector can be configured as Se-
rial Peripheral Interface (SPI). The SPI is a synchronous serial interface for control and data
transfer between LTE Terminals and the external application. Only one application can be con-
nected to the SPI and the interface supports only master mode. The transmission rates are up
to 6.5Mbit/s. The SPI interface comprises the two data lines MOSI and MISO, the clock line
SPI_CLK a well as the chip select line SPI_CS.
The following pins at the GPIO connector can be configured as SPI interface signals: SPI_CLK,
SPI_MOSI, SPI_MISO and SPI_CS (see also
Table 14 ). The configuration is done by AT com-
mand (see [1] ). It is non-volatile and becomes active after a module restart. For electrical char-
acteristics please refer to Table 23 .
To configure and activate the SPI interface use the AT^SSPI command. Detailed information
on the AT^SSPI command as well explanations on the SPI modes required for data transmis-
sion can be found in
[1] . SPI, ADC1_IN and DSR0 functionalities are mutually exclusive.
In general, SPI supports four operation modes. The modes are different in clock phase and
clock polarity. The module’s SPI mode can be configured by using the AT command AT^SSPI.
Make sure the module and the connected slave device works with the same SPI mode.
Figure 16 shows the characteristics of the four SPI modes. The SPI modes 0 and 3 are the most
common used modes.
Figure 16:
Characteristics of SPI modes
SPI MODE 0 SPI MODE 1
SPI MODE 2 SPI MODE 3
Clock phase
C
lock p
o
larity
SPI_CS
MOSI
SPI_CLK
MISO
SPI_CS
MOSI
SPI_CLK
MISO
SPI_CS
MOSI
SPI_CLK
MISO
SPI_CS
MOSI
SPI_CLK
MISO
Sample Sample
Sample Sample