GE TELUM ASLP11, Reference Manual

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(‘slave’). The decision in which mode the ASLP11 has to work, is done
within the IPMI handling before the payload power has been switched on.
Based on this PCIe switch two or more ASLP11 can be put into the same
system using a PCIe interconnect between them. When using the full link
width of 8 lanes (‘x8’), which must be supported by the used backplane, the
theoretical maximum transfer rate between any two of these ASLP11s is 4
GBytes/s.
Interrupt Controller
The Interrupt controller on a standard PC consists of two 82C59A devices
with eight interrupt request lines each. The two controllers are cascaded so
that 14 external and two internal interrupt sources are available. The master
interrupt controller provides IRQ [7...1], the slave interrupt controller
provides IRQ [15...8]. IRQ2 is used to cascade the two controllers, IRQ0 is
used as a system timer interrupt and is tied to interval timer 1, counter 0. The
remaining 14 interrupt lines are mapped to various onboard devices. Each
82C59A provides several internal registers. The interrupts at the IRQ input
lines are handled by two registers, the interrupt request register IRR and the
in-service register ISR. For programming details see the 82C59A data sheet.
The ASLP11 supports also the Interrupt handlings with APIC (Advanced
Interrupt Controller). This handling of the APIC interrupt services must be
supported by the operating system. The I/O APIC handles interrupts very
differently from the 8259.
Timer
Standard PCs like the ASLP11 are equipped with an 8254 compatible timer.
This timer contains three counters. Each counter output provides a key system
function. Counter 0 is connected to interrupt controller input IRQ0 and
provides a system timer interrupt for time-of-day, floppy disk timeout and
other system timing functions. Counter 1 generates a refresh request signal
and Counter 2 generates the sound for the speaker.
The following table gives an overview over the 8254 functions.
GE Intelligent Platforms – ASLP11 Hardware Reference Manual, Third Edition Page 46