Avila Network Computer Operating Manual
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20
GPIO(3) – GPIO Header (J8)
21
GPIO(4) – GPIO Header (J8)
22
GPIO(5) – Reserved for Serial Transceiver Control
23
GPIO(6) – Reserved for I2C Bus SCL
24
GPIO(7) – Reserved for I2C Bus SDA
25
GPIO(8) - Mini-PCI Socket J2 INTA or Mini-PCI
Socket J4 INTB
26
GPIO(9) - Mini-PCI Socket J4 INTA or Mini-PCI
Socket J1 INTB
27
GPIO(10) - Mini-PCI Socket J1 INTA or Mini-PCI
Socket J3 INTB
28
GPIO(11) - Mini-PCI Socket J3 INTA or Mini-PCI
Socket J2 INTB or USB Host Controller
29
GPIO(12) – Compact Flash Socket
30
SW Interrupt 0
31
SW Interrupt 1
Interrupt Map
2.4. Digital I/O Mapping
The GW2348-4 uses the IXP42x Processor digital I/O for controlling and
monitoring the status of various devices. The IXP42x processor includes three
16-bit registers for configuring, initializing, and using the digital I/O. The output
enable register (GPOER) configures each bit as an input or output. The data
output register (GPOUTR) controls the digital I/O configured as outputs. The
input register (GPINR) reads the digital I/O configured as inputs. See the
Intel
IXP4XX Product Line and IXC1100 Control Plane Processors Developer’s
Manual – Chapter 13.
The digital I/O bit mapping is shown below.
GPIO Bit
Direction
Description
0
In or Out
Digital I/O Header J8 pin 1
1
In or Out
Digital I/O Header J8 pin 3
2
In or Out
Digital I/O Header J8 pin 5
In or Out
Digital I/O Header J8 pin 7 or
Out
Unpopulated Status LED D20 or
3
Out
Status LED D21
4
In or Out
Digital I/O Header J8 pin 9
Out
RS232 Serial Port Driver Enable or
5
Out
Unpopulated Status LED D19
6
Out
I2C Bus SCL
7
Bidirectional I2C Bus SDA
8 In
Unpopulated
Mini-PCI
Interrupt
9
In
Mini-PCI Interrupt – See IRQ Map Section 2.3
10
In
Mini-PCI Interrupt – See IRQ Map Section 2.3
11
In
Mini-PCI Interrupt – See IRQ Map Section 2.3
12
In
Unpopulated Compact Flash Interrupt
13 Out
PCI
Reset
14
Out
Unpopulated Watchdog Timer Strobe
15
Out
Expansion Bus Clock
Digital I/O Map
