Furuno FELCOM 12, Service Manual

Page: 50 / 118

3-10
Figure 3-9
Block Diagram of CPU Board
D/A (U12)
ROM (U39)
SRAM (U51)
Flash ROM (U26)
SRAM (U40 )
RTC (U36)
EE-PROM (U11)
SIO (U22)
PIO (U13)
BATT
RS-232C Level converter
Dual port RAM (U41)
RAM (U53/52)
VITERBI (U54)
DEMODO DSP (U58)
ROM (U44)
RAM (U56)
DDS (U66)
CPU 1 (U49)
REF DIV.
0/90
°
BIO CONT
16MHz
36MHz
I
Q
CPU 2 (U23)
Level converter
RS-232C Level converter RS-232C Level converter
ALARM driver
BZ
DIP SW (S1)
NMEA level converter
SIO (U33)
(U10)
REF CONT
RUN ERR
HPA ON
SYN
RX MODE
A/D (U71)
ANT CUR
ANT VOL AGC LEVEL
TX LEVEL
DTE 1 DTE 2 RCV BZ
DMC 1 DMC 2
Watch Dog Timer
Power ON Reset
TEST
LOCK
CARRIER
INTP0 INTP2
INTP1
INT
SIO 0 SIO 1
TIM 0 TIM 1 TIM CTR
DMA 0 DMA 1
CPU1
RESET
8MHz
MRES
8MHz
CTC 0 CTC 1 CTC 2
RUN ERR
UWDET
PIO
15.6MHz
CPU 2
Analog PIN
Analog PIN
UNLOCK 1
UNLOCK 2 UNLOCK 3
PIO
INTP0 INTP2
INTP1
SIO 0
S-DATA
TX ON
P/S CONV.
TX DATA
TIM CRT TIM 1 TIM 0
DMA 1 DMA 0
RESET
GPS PC/DATA
NMEA-0183
NAV DEVIC
E
S-DATA
TX ON
RESET
50kHz
REF CONT
50kHz
15.6MHz
SIO 1
SRAM (U27 )
(U17)