Video Block Diagram
HG242BLV
1-7-2
SP
HEAD
AMP
REC FM
AGC
TO SERVO/SYSTEM
CONTROL BLOCK
TO
SERVO/SYSTEM
CONTROL BLOCK
RF-SW
D-REC-H
C-ROTA
D-V-SYNC
V-ENV
LUMINANCE
SIGNAL
PROCESS
CHROMINANCE
SIGNAL
PROCESS
V-ENV
D-V-SYNC
C-ROTA/RF-SW
TU701(TUNER UNIT)
IC301
(Y/C SIGNAL PROCESS)
IC501
(OSD)
REC-VIDEO SIGNAL PB-VIDEO SIGNAL MODE: SP/REC
SERIAL
DECORDER
V
-OUT1
1
V
-IN1
1
33
V
-OUT2
1
V
-IN2
3
1
3
JACK CBA
48
50
52
56
24
6
50
52
19
20
JK101
V-OUT1
V-IN1
19
20
JK102
CN151
CN152
CN101
CN102
V-OUT2
V-IN2
61
63
CHARA.
INS.
CCD 1H DELAY
SP
BYPASS
MUTE
PB/EE
IN1
TUNER
IN1
TUNER
MUTE
PB/EE
IN2
IN2
AGC
P
R
R
Y
C
P
RP
R
P
Y. DELAY
Y/C
MIX
+
21
79
78
AGC
VXO
OSD
CHARACTER
MIX
FBC
1/2
58
59
65
29
28
IIC-B
US SD
A
IIC-B
US SCL
69
68
46
43
84
62
70
D-REC-H
80
BUFFER
Q101
BUFFER
Q102
J23
V-OUT
WF1
TP301
X301
4.433619MHz
C-PB
WF3
VIDEO-OUT
VIDEO-IN
BUFFER
Q351
MAIN CBA
TP502
RF-SW
WF2
C-SYNC
C-SYNC
67
V(R)-1
V-COM
V(L)-2
CN253
1
2
3
96
95
93
94
54
FRT
FRT
JK756
V-IN
FR
ONT
B
H-A-SW
71
H-A-COMP
83
H-A-SW
H-A-COMP
B
CYLINDER ASSEMBLY
(DECK ASSEMBLY)
VIDEO (R)-1
HEAD
EP
HEAD
AMP
VIDEO (L)-1
HEAD
VIDEO (L)-2
HEAD
VIDEO (R)-2
HEAD
V(L)-2
V-COM
V(R)-2
4
5
6
90
89
88
87
EP
B
Comparison Char
t of
Models & Marks
Model
Mark
29B-250
29B-750
A
B
