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CHAPTER 17 DMA CONTROLLER
17.3.1 DMAC parameter descriptor pointer (DPDP)
This pointer stores the start address in the descriptor table for the DMAC in RAM.
Bits 0 to 6 are always set to 0. The start address of the descriptor can be set in units of
128 bytes.
■
DMAC parameter descriptor pointer (DPDP)
The register configuration of the DMAC parameter descriptor pointer (DPDP) is given below.
•
Upon reset, the pointer is not initialized.
•
The pointer value can be read and written.
•
Use a 32-bit transfer instruction to access this register.
The descriptor used to specify the operating mode for each channel is placed at an address set
by the DPDP, as covered in Table 17.3-1 "Descriptor address for each channel".
31
7
6
0
00000200
H
0000000
Initial value: 0000000
B
Initial value: Undefined
Table 17.3-1 Descriptor address for each channel
DMA channel
Descriptor address
DMA channel
Descriptor address
0
DPDP + 0 (00
H
)
4
DPDP + 48 (30
H
)
1
DPDP + 12 (0C
H
)
5
DPDP + 60 (3C
H
)
2
DPDP + 24 (18
H
)
6
DPDP + 72 (48
H
)
3
DPDP + 36 (24
H
)
7
DPDP + 84 (54
H
)
Summary of Contents for MB91150 Series
Page 1: ......
Page 2: ......
Page 3: ...FUJITSU LIMITED FR30 32 BIT MICROCONTROLLER MB91150 Series HARDWARE MANUAL ...
Page 4: ......
Page 10: ...vi ...
Page 112: ...96 CHAPTER 3 MEMORY SPACE CPU AND CONTROL UNIT ...
Page 178: ...162 CHAPTER 5 I O PORTS ...
Page 214: ...198 CHAPTER 7 16 BIT RELOAD TIMER ...
Page 240: ...224 CHAPTER 8 PPG TIMER ...
Page 310: ...294 CHAPTER 13 8 10 BIT A D CONVERTER ...
Page 318: ...302 CHAPTER 14 8 BIT D A CONVERTER ...
Page 362: ...346 CHAPTER 15 UART ...
Page 420: ...404 CHAPTER 19 PERIPHERAL STOP CONTROL ...
Page 428: ...412 CHAPTER 20 CALENDAR MACROS ...
Page 503: ...487 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 510: ...494 INDEX ...
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