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CHAPTER 3 CPU
3.9.1
Bank Select Prefix (PCB, DTB, ADB, SPB)
A bank select prefix is placed before an instruction to select the memory space
accessed by the instruction regardless of the addressing method.
■
Bank Select Prefixes (PCB, DTB, ADB, SPB)
The memory space used for data access is defined for each addressing method. If a bank select prefix is
placed before an instruction, the memory space accessed by the instruction can be selected regardless of the
addressing method. Table 3.9-1 lists the bank select prefix codes and selected memory spaces.
If a bank select prefix is used, some instructions perform an unexpected operation.
Table 3.9-2 lists the instructions that are not affected by bank select prefix codes. Table 3.9-3 lists
instructions that require caution when they are used.
Table 3.9-1 Bank Select Prefix Codes and selected Memory Spaces
Bank select prefix
Selected space
PCB
Program space
DTB
Data space
ADB
Additional space
SPB
When the value of the S flag in the condition code register (CCR) is "0" and the
user stack space is "1", the system stack space is used.
Table 3.9-2 Instructions not affected by Bank Select Prefix Codes
Instruction type
Instruction
Effect of bank select prefix
String instruction
MOVS MOVSW
SCEQ SCWEQ
FIL SFILSW
The bank register specified by the
operand is used whether or not a prefix is
used.
Stack
operation
PUSHW POPW
When the S flag is "0", the user stack bank
(USB) is used whether or not there is a
prefix. When the S flag is "1", the system
stack bank (SSB) is used regardless of
whether a prefix is used.
I/O access instruction
MOV A MOVX A, io
MOVW A, io
MOV io, A MOVW io, A
MOV io, #imm8 MOVW io,#imm16
MOVB A, io : bp MOVB io : bp, A
SETB io : bp CLRB io : bp
BBC io : bp, rel BBS io : bp, rel
WBTC io, bp WBTS io : bp
The I/O space (000000
H
to 0000FF
H
) is
accessed whether or not there is a
prefix.
Interrupt return
instruction
RETI
The system stack bank (SSB) is used
whether or not a prefix is used.
Summary of Contents for MB90460 Series
Page 1: ...The following document contains information on Cypress products ...
Page 3: ......
Page 5: ......
Page 9: ...iv ...
Page 41: ...22 CHAPTER 1 OVERVIEW ...
Page 45: ...26 CHAPTER 2 NOTES ON HANDLING DEVICES ...
Page 83: ...64 CHAPTER 3 CPU ...
Page 95: ...76 CHAPTER 4 RESET ...
Page 107: ...88 CHAPTER 5 CLOCK ...
Page 131: ...112 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 175: ...156 CHAPTER 7 INTERRUPT ...
Page 181: ...162 CHAPTER 8 MODE SETTING ...
Page 223: ...204 CHAPTER 9 I O PORT ...
Page 237: ...218 CHAPTER 10 TIME BASE TIMER ...
Page 247: ...228 CHAPTER 11 WATCHDOG TIMER ...
Page 275: ...256 CHAPTER 12 16 BIT RELOAD TIMER ...
Page 373: ...354 CHAPTER 14 MULTI FUNCTIONAL TIMER ...
Page 485: ...466 CHAPTER 16 PWC Timer ...
Page 531: ...512 CHAPTER 17 UART ...
Page 559: ...540 CHAPTER 19 DELAYED INTERRUPT GENERATOR MODULE ...
Page 589: ...570 CHAPTER 20 8 10 BIT A D CONVERTER ...
Page 601: ...582 CHAPTER 21 ROM CORRECTION FUNCTION ...
Page 633: ...614 CHAPTER 23 512K 1024K BIT FLASH MEMORY ...
Page 645: ...626 CHAPTER 24 EXAMPLE OF F2 MC 16LX MB90F462 F462A F463A CONNECTION FOR SERIAL WRITING ...
Page 715: ...696 APPENDIX ...
Page 716: ...697 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 739: ......