Fujitsu MB90460 Series, Hardware Manual, Page: 575 / 739

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CHAPTER 20 8/10-BIT A/D CONVERTER
20.5 8/10-bit A/D Converter Interrupts
The 8/10-bit A/D converter can generate an interrupt request when the data for the A/D
conversion is set in the A/D data register. This function supports the extended
intelligent I/O service (EI
2
OS).
■
8/10-bit A/D Converter Interrupts
Table 20.5-1 indicates the interrupt control bits of the 8/10-bit A/D converter and the interrupt cause.
When A/D conversion is performed and its result is set in the A/D data register (ADCR), the INT bit of the
A/D control status register (ADCS1) is set to "1". If the interrupt request is enabled (ADCS1: INTE = 1),
an interrupt request is output to the interrupt controller.
■
8/10-bit A/D Converter Interrupts and EI
2
OS
■
EI
2
OS Function of the 8/10-bit A/D Converter
Using the EI
2
OS function, the 8/10-bit A/D converter can transfer the A/D conversion result to memory.
When the transfer is performed, a conversion data protection function halts the A/D conversion until the A/D
conversion data is transferred to memory, and clears the INT bit. The function prevents any part of the data
from being lost.
Table 20.5-1 Interrupt Control Bits of the 8/10-bit A/D Converter and the Interrupt Cause
8/10-bit A/D converter
Interrupt request flag bit ADCS1: INT
Interrupt request enable bit ADCS1: INTE
Interrupt cause Writing the A/D conversion result to the A/D data register
Table 20.5-2 8/10-bit A/D Converter Interrupts and EI
2
OS
Interrupt no.
Interrupt control register Vector table address
EI²OS
Register
name
Address Lower Upper Bank
#11 (0B
H
)
ICR00
0000B0
H
FFFFD0
H
FFFFD1
H
FFFFD2
H
O
O: Available