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CHAPTER 16 PWC Timer
●
Continuous measurement mode
At termination of measurement, the timer measurement results are transferred to PWC0/ PWC1.
When PWC0/ PWC1 is read, the previous measurement results are read. While measurement is in
progress, the previous measurement results are stored in PWC0/ PWC1. During measurement, the timer
value cannot be read.
In continuous measurement mode, unless the previous measurement results are read before completion of
the next measurement, a new measurement result overwrites the existing value. The error flag (ERR) of
PWCSH0/PWCSH1 is set. When PWC0/ PWC1 is read, the error flag (ERR) is cleared automatically.
■
Minimum Input Pulse Width
The pulse must be input to the pulse-width count input pin (PWI0/PWI1) longer than the following
minimum input pulse width.
Pulse width: 2 machine cycles (0.125
µ
s or more for the machine clock at 16 MHz)
However, the input pulse that is shorter than the above specification may also be recognized as a valid
pulse.
■
Calculating Pulse Width/period
The pulse width or pulse period of the measurement object is calculated based on the count result read from
PWC0/PWC1 at the end of a count as follows.
■
Pulse Width/period Measurement Range
The range of the pulse width/period that can be measured depends on the count clock and division rate of
an input divider.
Table 16.6-5 lists the measurement range for the machine cycle (indicated by
φ
) at 16 MHz
T
W
= n x t / Div (
µ
s)
T
W
Measured pulse width or pulse period (
µ
s)
......
n
Measurement result contained in PWC0/PWC1
......
t
Count clock period (
µ
s)
......
Div
Division rate set in the division rate register (DIV0/DIV1)
......
(a value of "1" is used in a mode other than the division count mode)
Table 16.6-5 Pulse Width Measurement Range
Division rate
DIV1,
DIV0
CKS1,CKS0=00
B
(
φ
/4)
CKS1,CKS0=01
B
(
φ
/16)
CKS1,CKS0=10
B
(
φ
/32)
No division
-
0.125
µ
s to 16.38 ms [0.25
µ
s] 0.125
µ
s to 65.5 ms [1.0
µ
s]
0.125
µ
s to 131 ms [2
µ
s]
Divide-by 4
00
B
0.125
µ
s to 4.10 ms [62.5 ns]
0.125
µ
s to 16.38 ms [0.25
µ
s] 0.125
µ
s to 32.75 ms [500 ns]
Divide-by 16
01
B
0.125
µ
s to 1024
µ
s [15.6 ns]
0.125
µ
s to 4.10 ms [62.5 ns]
0.125
µ
s to 8.19 ms [125 ns]
Divide-by 64
00
B
0.125
µ
s to 256
µ
s [3.91 ns]
0.125
µ
s to 1024
µ
s [15.6 ns]
0.125
µ
s to 2.048 ms [31.25 ns]
Divide-by 256
11
B
0.125
µ
s to 64
µ
s [0.98 ns]
0.125
µ
s to 256
µ
s [3.91 ns]
0.125
µ
s to 512
µ
s [7.81 ns]
(Note) The number in [ ] indicates the resolution per bit.
Summary of Contents for MB90460 Series
Page 1: ...The following document contains information on Cypress products ...
Page 3: ......
Page 5: ......
Page 9: ...iv ...
Page 41: ...22 CHAPTER 1 OVERVIEW ...
Page 45: ...26 CHAPTER 2 NOTES ON HANDLING DEVICES ...
Page 83: ...64 CHAPTER 3 CPU ...
Page 95: ...76 CHAPTER 4 RESET ...
Page 107: ...88 CHAPTER 5 CLOCK ...
Page 131: ...112 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 175: ...156 CHAPTER 7 INTERRUPT ...
Page 181: ...162 CHAPTER 8 MODE SETTING ...
Page 223: ...204 CHAPTER 9 I O PORT ...
Page 237: ...218 CHAPTER 10 TIME BASE TIMER ...
Page 247: ...228 CHAPTER 11 WATCHDOG TIMER ...
Page 275: ...256 CHAPTER 12 16 BIT RELOAD TIMER ...
Page 373: ...354 CHAPTER 14 MULTI FUNCTIONAL TIMER ...
Page 485: ...466 CHAPTER 16 PWC Timer ...
Page 531: ...512 CHAPTER 17 UART ...
Page 559: ...540 CHAPTER 19 DELAYED INTERRUPT GENERATOR MODULE ...
Page 589: ...570 CHAPTER 20 8 10 BIT A D CONVERTER ...
Page 601: ...582 CHAPTER 21 ROM CORRECTION FUNCTION ...
Page 633: ...614 CHAPTER 23 512K 1024K BIT FLASH MEMORY ...
Page 645: ...626 CHAPTER 24 EXAMPLE OF F2 MC 16LX MB90F462 F462A F463A CONNECTION FOR SERIAL WRITING ...
Page 715: ...696 APPENDIX ...
Page 716: ...697 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 739: ......