Fujitsu MB90460 Series, Hardware Manual, Page: 417 / 739

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CHAPTER 15 MULTI-PULSE GENERATOR
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Output Data Register (OPDR)
The content of the Output Data Register (OPDR) is received from the Output Data Buffer Register
(OPDBRB to OPDBR0) according to the write timing signal (WTO) generated by the Data Write Control
Unit, and the OPTx output waveform is updated. Moreover, the output level can be compulsorily fixed by
the DTTI1 pin input.
The OPTx output waveform timing diagram is shown in Figure 15.6-2 and the operation is explained in
following paragraphs.
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OPTx Output Waveform Timing Diagram (WTS1,WTS0 = 00
B
)
Figure 15.6-2 OPTx Output Waveform Timing Diagram (WTS1,WTS0 = 00
B
)
Table 15.6-1 Output Data Register (OPDR)
OPx1,OPx0 Setting OPTx Output
OPx1,OPx0 = 0,0 Low Level
OPx1,OPx0 = 0,1 16-bit PPG Timer Output
OPx1,OPx0 = 1,0 16-bit PPG Timer Inverted Output
OPx1,OPx0 = 1,1 High Level
00 01 11 10
OPx1,
OPx0
PPG
OPTx
L Output
PPG Output
PPG Inverted Output H Output
WTO
(OPDR)