Fujitsu MB90460 Series, Hardware Manual, Page: 199 / 739

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CHAPTER 9 I/O PORT
9.5.1 Port 2 Registers (PDR2 and DDR2)
This section describes the port 2 registers.
■
Functions of Port 2 Registers
●
Port 2 data register (PDR2)
The PDR2 register indicates the state of each pin of port 2.
●
Port 2 data direction register (DDR2)
The DDR2 register specifies the direction of a data flow (input or output) at each pin (bit) of port 2. When
a DDR2 register bit is "1", the corresponding port (pin) is set as an output port. When the bit is "0", the
port (pin) is set as an input port.
References:
• When a resource having output pins is used, the port functions as resource output pins regardless
of the value in the DDR2 register as long as the resource output enable bit corresponding to the
pins is set.
• To use a resource having input pins, reset the DDR2 register bit corresponding to each resource
input pin to "0" to place the port in input mode.
Table 9.5-3 lists the functions of the port 2 registers.
Table 9.5-3 Port 2 Register Functions
Register Data
During
reading
During writing
Read/
Write
Address Initial value
Port 2 data
register (PDR2)
0
The pin is
at the low
level. The output latch is loaded with 0.
When the pin functions as an output
port, the pin is set to the low level.
R/W
000002
H
XXXXXXXX
B
1
The pin is
at the high
level. The output latch is loaded with 1.
When the pin functions as an output
port, the pin is set to the high level.
Port 2 data
direction
register (DDR2)
0
The
direction
latch is "0".
The output buffer is turned off to
place the port in input mode.
R/W
000012
H
00000000
B
1
The
direction
latch is "1".
The output buffer is turned on to
place the port in output mode.
R/W: Read/write enabled
X : Undefined