Fujitsu MB90460 Series, Hardware Manual, Page: 198 / 739

179
CHAPTER 9 I/O PORT
■
Block Diagram of Port 2 Pins
Figure 9.5-1 is a block diagram of port 2 pins.
Figure 9.5-1 Block Diagram of Port 2 Pins
When the resource output enable bit is set, the port is forcibly caused to function as resource
output pins regardless of the value in the DDR2 register.
■
Port 2 Registers
Port 2 registers are PDR2 and DDR2. The bits making up each register correspond to the port 2 pins on a
one-to-one basis. Table 9.5-2 lists the port 2 pins and their corresponding register bits.
Inter
nal
data bus
Port data register (PDR)
PDR read
PDR write
Output latch
DDR read
DDR write
Direction latch
Port data direction register (DDR)
Pin
Standby control (SPL = 1)
Resource output
Resource output enable
Resource input
Table 9.5-2 Port 2 Pins and their Corresponding Register Bits
Port Register bits and corresponding port pins
Port 2
PDR2, DDR2 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Corresponding pin P27 P26 P25 P24 P23 P22 P21 P20