Fujitsu MB90460 Series, Hardware Manual, Page: 126 / 739

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CHAPTER 6 LOW POWER CONSUMPTION MODE
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Low Power Consumption Mode Operating States
Table 6.6-1 lists the operating states of low power consumption mode.
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Clock mode switching and release (excluding standby mode)
Table 6.6-2 lists clock mode switching and release.
Table 6.6-1 Low Power Consumption Mode Operating States
Low power
consumption
mode
Condition
for transition
Oscillation Clock CPU Peripheral Pin
Release
event
Main sleep
MCS = 1
SLP = 1
Active Active Inactive Active Active
Reset or
interrupt
PLL sleep
MCS = 0
SLP = 1
Active Active Inactive Active Active
Reset or
interrupt
Main/PLL
time-base timer
(SPL = 0)
MCS = x
TMDX = 0
Active Active Inactive Inactive Hold
Reset or
interrupt
Main/PLL
time-base timer
(SPL = 1)
MCS = x
TMDX = 0
Active Active Inactive Inactive Hi-Z
Reset or
interrupt
Main/PLL stop
(SPL = 0) MCS = x
STP = 1
Inactive Inactive Inactive Inactive Hold
Reset or
interrupt
Main/PLL stop
(SPL = 1) MCS = x
STP = 1
Inactive Inactive Inactive Inactive Hi-Z
Reset or
interrupt
Table 6.6-2 Clock Mode Wwitching and Release
Transition Conditions
After power-on, transition to
the main run state [1] Source clock oscillation stabilization wait interval ends. (Time-base timer output)
[2] Reset input has been cleared.
Reset during main run state [3] External reset, software reset, or watchdog timer reset
Transition from main run
state to PLL run state
[19] MCS = 0 (After PLL clock oscillation stabilization wait, switch to PLL clock) *
Return to main run state
from PLL run state
[20] MCS = 1 (PLL clock deactivated)
Reset during PLL run state
[6] External reset or software reset ([7] After reset, return to PLL run state)
[13] Watch dog reset ([2] After reset, return to main run state)
*:The microcontroller operates using the main clock during the PLL clock oscillation stabilization wait state.