71
CHAPTER 3 INTERRUPTS
3.7
Extended Intelligent I/O Service (EI
2
OS)
The EI
2
OS function automatically transfers data between input and output and memory.
An interrupt processing program was conventionally used for such processing, but
EI
2
OS enables data transfer to be performed like DMA (direct memory access).
■
Extended Intelligent I/O Service (EI
2
OS)
EI
2
OS has the following advantages over the conventional method:
•
The program size can be small because it is not necessary to write a transfer program.
•
No internal register is used for transfer, eliminating the need for register saving and increasing the
transfer speed.
•
Transfer can be terminated from I/O, preventing unnecessary data from being transferred.
•
The buffer address may either be incremented or left unupdated.
•
The I/O register address may either be incremented or left unupdated.
At the end of EI
2
OS, processing automatically branches to an interrupt processing routine after the end
condition is set. Thus, the user can identify the end condition.
To implement EI
2
OS, the hardware is distributed in two blocks. Each block has the following registers and
descriptors.
•
Interrupt control register: Exists in the interrupt controller and indicates the ISD address.
•
Extended intelligent I/O service descriptor (ISD): Exists in RAM and holds the transfer mode, I/O
address, number of transfers, and buffer address.
Figure 3.7-1 shows the outline of extended intelligent I/O service.
Summary of Contents for MB90390 Series
Page 2: ......
Page 4: ......
Page 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
Page 18: ...xiv ...
Page 132: ...104 CHAPTER 5 CLOCKS ...
Page 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Page 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Page 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Page 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Page 274: ...246 CHAPTER 15 WATCH TIMER ...
Page 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Page 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Page 364: ...336 CHAPTER 19 UART0 UART1 ...
Page 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Page 432: ...404 CHAPTER 20 UART2 UART3 ...
Page 482: ...454 CHAPTER 22 SERIAL I O ...
Page 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Page 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Page 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
Page 722: ...694 APPENDIX ...
Page 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
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