479
CHAPTER 23 CAN CONTROLLER
23.6.6
Message Buffer Valid Register (BVALR)
Message buffer valid register (BVALR) stores the validity of the message buffers or
displays their state.
■
Message Buffer Valid Register (BVALR)
Figure 23.6-9 Configuration of the Message Buffer Valid Register (BVALR)
[bit15 to bit0] BVAL15 to BVAL0:
"0": Message buffer (x) invalid
"1": Message buffer (x) valid
If the message buffer (x) is set to invalid, it will not transmit or receive messages.
If the buffer is set to invalid during transmission operating, it becomes invalid (BVALx = 0) after the
transmission is completed or terminated by an error.
If the buffer is set to invalid during reception operating, it immediately becomes invalid (BVALx = 0). If
received messages are stored in a message buffer (x), the message buffer (x) is invalid after storing the
messages.
Notes:
•
x indicates a message buffer number (x = 0 to 15).
•
When invaliding a message buffer (x) by writing "0" to a bit (BVALx), execution of a bit
manipulation instruction is prohibited until the bit is set to "0".
•
To invalidate the message buffer (by setting the BVALR: BVAL bit to "0") while the CAN controller
is operating for CAN communication (the read value of the CSR: HALT bit is "0" and the CAN
controller is operating for CAN bus communication to enable transmission and reception), follow
the procedure in Section "23.16 Precautions when Using CAN Controller".
15
bit
bit
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Initial value
0 0 0 0 0 0 0 0
B
R/W R/W R/W R/W
R/W
R/W
R/W
R/W
Address:
H
CAN0: 000071
CAN1: 000081
CAN2: 003571
CAN3: 003581
CAN4: 003591
H
H
H
H
BVALRn (upper)
Initial value
0 0 0 0 0 0 0 0
B
Address:
H
CAN0: 000070
CAN1: 000080
CAN2: 003570
CAN3: 003580
CAN4: 003590
H
H
H
H
BVALRn (lo
w
er)
BVAL15 BVAL14 BVAL13 BVAL12 BVAL11 BVAL10 BVAL9 BVAL8
BVAL7 BVAL6 BVAL5 BVAL4 BVAL3 BVAL2 BVAL1 BVAL0
R/W R/W R/W R/W
R/W
R/W
R/W
R/W
n = 0, 1, 2, 3, 4
Summary of Contents for MB90390 Series
Page 2: ......
Page 4: ......
Page 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
Page 18: ...xiv ...
Page 132: ...104 CHAPTER 5 CLOCKS ...
Page 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Page 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Page 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Page 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Page 274: ...246 CHAPTER 15 WATCH TIMER ...
Page 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Page 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Page 364: ...336 CHAPTER 19 UART0 UART1 ...
Page 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Page 432: ...404 CHAPTER 20 UART2 UART3 ...
Page 482: ...454 CHAPTER 22 SERIAL I O ...
Page 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Page 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Page 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
Page 722: ...694 APPENDIX ...
Page 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
Page 740: ......