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FSC B17-1 Service Manual
24
PHS
RMADDR12
RMDATA5
HOST_PROTOCOL
D3.3V
EB0
OPR5
RED-
P.2
RMADDR2
OG2
FB205
600
R238
10K
1/16W
EG5
OPR1
C208
0.1uF/16V
C215
0.1uF/16V
PWM0
P.4
BLUE-
P.2
OR0
R201
NC(1K)
R239
10K
1/16W
OR2
OPB5
+PV
GND
DVI_PLUG
P.2
OG1
EG6
/CE
FB202
60
C234
0.1uF/16V
C205
0.1uF/16V
If using 6-wire host protocol, program this bit to 0
ROM_ADDR14
EMI SOULATION ADD C253
RMADDR6
OPG3
HOST_PORT_EN
SCL
ER4
RX2+
P.2
RMADDR2
OB6
OPG1
32-Pin PLCC Socket
1206
PBIAS
P.5
OPB[0..7]
P.5
EPR2
3
RMADDR13
RMADDR4
DVS
OPB4
+PV
DDC_SDA
P.2
DVS
OPR7
RMDATA6
C219
0.1uF/16V
Determines polarity of HCLK signal
OCM_ROM_CFG(1)
EG7
RMADDR3
EG1
OB1
C247
5pF
RP210
0 1/16W
1
2
3
4
8
7
6
5
OCM_START
RXC-
P.2
RMADDR6
OPG0
C232
0.1uF/16V
RMDATA0
R241
33
FB205
EG4
EPB0
FB204
NC
OB7
GPIO7
Int_Test
U203
PQFP208
GM5120/GM2120
171
170
167
166
163
162
179
180
185
186
191
192
151
152
40
41
42
43
44
45
46
47
49
50
51
52
118
115
117
116
195
194
174
120
121
122
123
124
125
126
127
128
206
207
208
1
205
204
5
4
6
7
48
39
201
25
24
23
22
19
18
17
16
15
8
35
34
33
32
31
30
29
28
9
10
14
12
13
11
36
155
153
165
169
161
158
157
178
2
20
53
67
81
97
111
129
26
88
134
203
176
113
114
175
182
184
188
190
197
198
199
150
149
148
146
144
141
139
145
140
137
136
3
21
38
54
68
82
98
112
130
89
133
202
135
156
154
177
183
189
147
143
138
200
159
61
62
65
66
69
70
71
72
94
93
75
76
77
78
79
80
74
73
85
86
87
90
91
92
84
83
95
96
99
100
101
102
64
63
105
106
107
108
109
110
104
103
119
27
131
142
132
60
59
58
57
56
55
37
160
164
168
172
173
181
187
193
196
RED+
RED-
GREEN+
GREEN-
BLUE+
BLUE-
RX2+
RX2-
RX1+
RX1-
RX0+
RX0-
XTAL
TCLK
GPIO0/PWM0
GPIO1/PWM1
GPIO2/PWM2
GPIO3/TIMER1
GPIO4/UART_D1
GPIO5/UART_D0
GPIO6/EXTCLK
GPIO7
GPIO10/TCON_ROE3
GPIO11
GPIO12
GPIO13
DCLK/TCON_OCLK
DEN/TCON_ECLK
DVS/TCON_FSYNC
DHS/TCON_LP
RXC-
RXC+
REXT
TCON_OPOL
TCON_OINV
TCON_ESP
TCON_EPOL
TCON_EINV
TCON_RSP2
TCON_RSP3
TCON_RCLK
TCON_ROE
GPIO20/HDATA3
GPIO19/HDATA2
GPIO18/HDATA1
GPIO17/HDATA0
GPIO16/HFS
GPIO22/HCLK
RESETn
GPIO21/IRQn
DDC_SCL
DDC_SDA
GPIO9/TCON_ROE2
GPIO8/IRQINn
CLKOUT
ROM_ADDR0
ROM_ADDR1
ROM_ADDR2
ROM_ADDR3
ROM_ADDR4
ROM_ADDR5
ROM_ADDR6
ROM_ADDR7
ROM_ADDR8
ROM_ADDR15
ROM_DATA0
ROM_DATA1
ROM_DATA2
ROM_DATA3
ROM_DATA4
ROM_DATA5
ROM_DATA6
ROM_DATA7
ROM_ADDR14
ROM_ADDR13
ROM_ADDR9
ROM_ADDR11
ROM_ADDR10
ROM_ADDR12
ROM_OEn
V
DD1_A
DC_2.5
V
DD2_A
DC_2.5
AGND_GREEN
AGND_RED
AGND_BLUE
AGND_ADC
SGND_ADC
AGND_RX2
RV
DD
RV
DD
RV
DD
RV
DD
RV
DD
RV
DD
RV
DD
RV
DD
CV
DD_2.5
CV
DD_2.5
CV
DD_2.5
CV
DD_2.5
V
DD_RX
2_2.5
PPWR
PBIAS
AGND_IMB
V
DD_RX
1_2.5
AGND_RX1
V
DD_RX
0_2.5
AGND_RX0
AGND_RXC
AGND_RXPLL
VDD_RXPLL_2.5
A
V
DD_RP
LL
AVSS_RPLL
V
DD_DP
LL_3.3
A
V
DD_S
DDS
V
DD_S
DDS
_3.3
A
V
DD_DDDS
V
DD_DDDS
_3.3
AVSS_SDDS
AVSS_DDDS
HSYNC
VSYNC
R
VSS
R
VSS
R
VSS
R
VSS
R
VSS
R
VSS
R
VSS
R
VSS
R
VSS
C
VSS
C
VSS
C
VSS
C
VSS
G
ND1_A
DC
G
ND2_A
DC
G
ND_RX
2
G
ND_RX
1
G
ND_RX
0
VSS_
D
PL
L
VSS_
S
D
D
S
V
S
S
_DDDS
N/C
ADC_TEST
PD6/ER6
PD7/ER7
PD10/EG2
PD11/EG3
PD12/EG4
PD13/EG5
PD14/EG6
PD15/EG7
PD33/OG1
PD32/OG0
PD18/EB2
PD19/EB3
PD20/EB4
PD21/EB5
PD22/EB6
PD23/EB7
PD17/EB1
PD16/EB0
PD26/OR2
PD27/OR3
PD28/OR4
PD29/OR5
PD30/OR6
PD31/OR7
PD25/OR1
PD24/OR0
PD34/OG2
PD35/OG3
PD36/OG4
PD37/OG5
PD38/OG6
PD39/OG7
PD9/EG1
PD8/EG0
PD42/OB2
PD43/OB3
PD44/OB4
PD45/OB5
PD46/OB6
PD47/OB7
PD41/OB1
PD40/OB0
TCON_OSP
C
VSS
Reserved
N/C
Reserved
PD5/ER5
PD4/ER4
PD3/ER3
PD2/ER2
PD1/ER1
PD0/ER0
RV
DD
AVD
D
_
AD
C
A
V
DD_B
L
UE
A
V
DD_G
R
E
E
N
A
V
DD_RE
D
A
V
DD_IM
B
A
V
DD_RX
2
A
V
DD_RX
1
A
V
DD_RX
0
A
V
DD_RX
C
U204
M24C16-MN6T
1
2
3
4
5
6
7
8
A0
A1
A2
VSS
SI
SCK
WP
VCC
/RESET
EPB6
SET
0
RMDATA3
R247
0
R232
10K
1/16W
EB3
RMADDR4
ER1
OG3
OPG5
C226
0.1uF/16V
R231
10K
1/16W
R244
4.7K
EPR[0..7]
P.5
OB1
EG3
OR6
R221
10K
R233
NC
GND
ROM_OEn
OG0
OR1
OPB6
C252
1uF/16V
C213
0.1uF/16V
R214
10K
2
EB4
RMDATA1
R246
10K
1/16W
U202 W39F010P-70P
3
29
28
4
25
23
26
27
5
6
7
8
9
10
11
12
21
20
19
18
17
15
14
13
24
31
32
1
16
2
30
22
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
OE
WE
VCC
NC
GND
A16
NC/A17
CE
GPIO8
P.4
ER5
GPIO0/PWM0
EG7
OPR0
C239
0.1uF/16V
GND
RMADDR1
EG2
C228
0.1uF/16V
x
1
+PV
GPIO2
P.4
RMADDR1
ER5
EPG5
A3.3V
/ROM_WE
RMADDR10
EPB1
R242 33
USER_BITS(7:5)
+PV
D3.3V
PCLK
RMADDR10
BANK0
FLASH/ Prom-Jet Socket
1
GND
OPG[0..7] P.5
EPR4
OPB2
RP211
0 1/16W
1
2
3
4
8
7
6
5
D2.5V
GND
/ROM_WE
EG2
RMDATA6
C203
0.1uF/16V
2003/02/21
RMADDR14
OB0
C260
22pF
C246
5pF
x
1 = All 48K of ROM is in external ROM
+PV
RED+
P.2
EG0
OPG4
GPIO3
P.4
EB1
OB4
C220
0.1uF/16V
If using 6-wire host protocol, program this bit to 1
A2.5V
D3.3V
OPR6
RMDATA5
PDEN
EB4
RXC+
P.2
ER6
EPR1
EMI SOULATION ADD C254
RMADDR10
ER2
RMADDR8
D-CLK
OG4
1
GPIO(22:16) is on "Host Port" pins
OPG6
R215
10K
GND
RMADDR15
DHS
OR2
FB204
R204
2.7K
C244
0.1uF/16V
RX0-
P.2
RMADDR12
EB0
RP202
0 1/16W
1
2
3
4
8
7
6
5
EB6
RMDATA1
RP203
0 1/16W
1
2
3
4
8
7
6
5
STBY_OUT
OB2
ER6
R206
10K
1/16W
R245
0
FB201
60
OR1
x
RMADDR8
0 = XTAL and TCLK pins are connected
OB5
RMADDR3
+3.3V
UART_DO
P.2
RMADDR5
OG3
OR7
OPB3
OPB7
C227
0.1uF/16V
ROM_ADDR(4:0)
HS
P.2
RMADDR8
EB5
OB4
R240
33
R223
10K
BANK0
RMADDR4
OB5
/CE
C231
0.1uF/16V
C207
0.1uF/16V
VGA_PLUG
P.2
EG3
OPG2
RP207
0 1/16W
1
2
3
4
8
7
6
5
R248
10K
C217
0.1uF/16V
0
GND
WP
EPR5
RP209
0 1/16W
1
2
3
4
8
7
6
5
C206
0.1uF/16V
R216 4.7K
1 = OCM becomes active after OCM_CLK is stable
Available for reading from a status register
OPR[0..7] P.5
ER1
SDA
ER3
EPB5
C209
0.1uF/16V
+5V
DEN
EPR7
RMDATA4
X201
14.318MHz
1
2
OR6
EPB3
PPWR
P.5
OG7
D-CLK
EPB7
R222 10K
3.3V
RX1+
P.2
OG5
EPR6
C251
1uF/16V
U201
TCM809SENB713
2
3
1
RST
VCC
GN
D
DDC_SCL
P.2
RMADDR12
EPG7
RMDATA3
RP204
0 1/16W
1
2
3
4
8
7
6
5
R234
NC
R227
0
C248
0.1uF/16V
R237
10K
1/16W
x
GND
RMADDR11
OG4
RMADDR1
OR3
C212
0.1uF/16V
OSC_SEL
DIGITAL PORT
+PV
LVDS_EN P.5
C253
0.1uF/16V
R208
10K 1/16W
EB1
RP208
0 1/16W
1
2
3
4
8
7
6
5
BOOTSTRAP SIGNALS
ResetIC:250ms
GND
GND
EB5
RMDATA0
C249
0.1uF/16V
C218
0.1uF/16V
D2.5V
ER7
GND
PVS
1
A3.3V
GND
RMADDR5
OG0
Available for reading from a status register
D3.3V
DDC_SDA_A
P.2
MUTE_OUT
SPEC(500mA)
RMADDR7
RMADDR14
GPIO3
EB6
USER_BITS(4:0)
R232 R231 RXXX
NC NC NC SAMSUNG EH
NC 10K NC CHIMEI E4
10K NC NC SAMSUNG EU
10K 10K NC HYDIS 200/300
NC NC 10K CPT 170EA02
NC 10K 10K (RESERVED)
10K NC 10K (RESERVED)
10K 10K 10K AU EN05
LED_ORANGE
P.5
OB2
C204
0.1uF/16V
GPIO6
P.4
EG4
+PV
LED_GREEN
P.5
RX2-
P.2
ER0
RMADDR0
RMADDR11
EPG0
R207
10K
1/16W
C254
0.1uF/16V
GREEN-
P.2
OG6
ER2
C214
0.1uF/16V
C238
0.1uF/16V
GPIO7
P.4
OB3
RMADDR0
OPR4
ROM_ADDR5
SDA
D201
NC (LL4148)
12/20
EB2
EPG2
RMDATA2
ADDRESS
GND
RMADDR11
OG2
DEN
OG6
OPB1
EPB[0..7]
P.5
/ROM_WE
RMADDR15
OPG7
FB203
60
OR4
OB6
RMADDR7
RMDATA7
RX0+
P.2
OR0
EB2
EPG6
R205 1K 1%
ROM_ADDR6
SPEC(60mA)
ROM_ADDR7
BLUE+
P.2
EG0
EPB4
C233
0.1uF/16V
C210
0.1uF/16V
NAME
OR4
RMDATA2
715L1061
C
gm5120
GM2120
C
3
6
Tuesday, March 04, 2003
Title
Size
Document Number
Rev
Date:
Sheet
of
UART_DI
P.2
RMADDR14
EPR0
+PV
ER4
R243
NC (22)
OG1
OPR3
RP201
0 1/16W
1
2
3
4
8
7
6
5
GREEN+
P.2
RMADDR9
OR5
C216
0.1uF/16V
Reserved
SPEC(150mA)
12/20
2003/02/21
EB7
OB3
ROM_ADDR9
+5V
VS
P.2
RMADDR3
+
C245
NC (10uF/16V)
RP212
0 1/16W
1
2
3
4
8
7
6
5
DESCRIPTION
EG5
EPG4
DDC_SCL_A
P.2
OR7
RMADDR9
RMADDR2
WP
GND
OG5
ER3
EPG3
C241
0.1uF/16V
EG6
GPIO6
GND
OPR2
SCLPOL
SPEC(50mA)
RMADDR13
DHS
RMDATA7
C201
0.1uF/16V
ROM_ADDR(12:10)
+PV
RX1-
P.2
VOL_OUT
OR3
OG7
EPR3
OPB0
RMADDR0
C242
0.1uF/16V
ROM_ADDR8
RMADDR9
ER0
OR5
OB7
GND
A2.5V
GND
EB7
RMDATA4
C240
0.1uF/16V
C202
0.1uF/16V
RP206
0 1/16W
1
2
3
4
8
7
6
5
A3.3V
SCL
EB3
EPG1
1206
A3.3V
EPG[0..7]
P.5
OB0
ER7
RP205
0 1/16W
1
2
3
4
8
7
6
5
8/26 modify
GND
EG1
EPB2
ROM_ADDR13
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