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CHAPTER 13 8/10-bit A/D converter
13.5.3
Pause-conversion mode
In the pause-conversion mode, A/D conversion starts and pauses repeatedly for each
channel.When the start trigger is input after the A/D conversion pauses at the
termination of the A/D conversion for the end channel, A/D conversion is continued
after returning to the start channel.
■
Setting of Pause-conversion Mode
Operating the 8-/10-bit A/D converter in the pause-conversion mode requires the setting shown in Figure
Figure 13.5-3 Setting of Pause-conversion Mode
■
Operation of Pause-conversion Mode
•
When the start trigger is input, A/D conversion starts at the channel set by the A/D conversion start
channel select bits (ANS2 to ANS0).The A/D conversion pauses at the termination of the A/D
conversion for one channel.When the start trigger is input while A/D conversion pauses, A/D
conversion for the next channel is performed.
•
The A/D conversion pauses at the termination of the A/D conversion for the channel set by the A/D
conversion end channel select bits (ANE2 to ANE0). When the start trigger is input while A/D
conversion pauses, A/D conversion is continued after returning to the channel set by the A/D conversion
start channel select bits (ANS2 to ANS0).
•
To restart this mode while A/D conversion pauses, input the start trigger set by the A/D start trigger
select bits in the A/D control status register (ADCS: STS1, STS0).
•
To terminate A/D conversion forcibly, write "0" to the A/D conversion-on flag bit in the A/D control
status register (ADCS: BUSY).
•
This mode cannot be restarted during A/D conversion.
PAUS STS1
STRT
STS0
BUSY NT INTE
ADCS
0
1
1
ANS1 ANS0
ANE1 ANE0
ANE2
MD1 MD0 ANS2
CT1 CT0
S10 ST1 ST0
ADCR
ADER
bit15 14 13 12 11 10
9 bit8 bit7 6
5
4
3
2
1
bit0
1
0
D9
D0 (hold the conversion result)
: Setting "1"
: Setting "1" to corresponding bit using as analog input pin
: Used bit
: Unused
Re-
served
: Setting "0"
Summary of Contents for F2MC-16LX Series
Page 2: ......
Page 3: ...FUJITSU LIMITED F2MC 16LX 16 bit Microcontroller MB90895 series Hardware Manual ...
Page 4: ......
Page 8: ...iv ...
Page 10: ...vi ...
Page 36: ...18 CHAPTER 2 HANDLING DEVICES ...
Page 176: ...158 CHAPTER 3 CPU ...
Page 224: ...206 CHAPTER 5 Timebase timer ...
Page 294: ...276 CHAPTER 8 16 bit reload timer ...
Page 366: ...348 CHAPTER 12 DTP external interrupt ...
Page 398: ...380 CHAPTER 13 8 10 bit A D converter ...
Page 446: ...428 CHAPTER 14 UART0 ...
Page 588: ...570 CHAPTER 17 Address Match Detecting Function ...
Page 626: ...608 CHAPTER 19 512 KBIT FLASH MEMORY ...
Page 676: ...658 APPENDIX Table A 9 3 Bit Operation Instruction Map first byte 6CH ...
Page 678: ...660 APPENDIX Table A 9 5 2 byte Instruction Map first byte 6FH MUL MULW DIVU A A A ...
Page 680: ...662 APPENDIX Table A 9 7 ea Instruction 2 first byte 71H ...
Page 681: ...663 APPENDIX A Instructions Table A 9 8 ea Instruction 3 first byte 72H ...
Page 682: ...664 APPENDIX Table A 9 9 ea Instruction 4 first byte 73H ...
Page 683: ...665 APPENDIX A Instructions Table A 9 10 ea Instruction 5 first byte 74H ...
Page 684: ...666 APPENDIX Table A 9 11 ea Instruction 6 first byte 75H ...
Page 685: ...667 APPENDIX A Instructions Table A 9 12 ea Instruction 7 first byte 76H ...
Page 686: ...668 APPENDIX Table A 9 13 ea Instruction 8 first byte 77H ...
Page 687: ...669 APPENDIX A Instructions Table A 9 14 ea Instruction 9 first byte 78H ...
Page 688: ...670 APPENDIX Table A 9 15 MOVEA RWi ea Instruction first byte 79H ...
Page 689: ...671 APPENDIX A Instructions Table A 9 16 MOV Ri ea Instruction first byte 7AH ...
Page 690: ...672 APPENDIX Table A 9 17 MOVW RWi ea Instruction first byte 7BH ...
Page 691: ...673 APPENDIX A Instructions Table A 9 18 MOV ea Ri Instruction first byte 7CH ...
Page 692: ...674 APPENDIX Table A 9 19 MOVW ea Rwi Instruction first byte 7DH ...
Page 693: ...675 APPENDIX A Instructions Table A 9 20 XCH Ri ea Instruction first byte 7EH ...
Page 694: ...676 APPENDIX Table A 9 21 XCHW RWi ea Instruction first byte 7FH ...
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