FR460 Hardware Set Up
Chapter 5 Reset Behaviour of GPIO ports and external bus
MCU-AN-300033-E-V15
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© Fujitsu Microelectronics Europe GmbH
5 Reset Behaviour of GPIO ports and external bus
THIS CHAPTER SHOWS THE BEHAVIOUR OF IO-PORT DURING AND AFTER RESET
During the power-on or INITX reset state the GPIO port pins are going to HiZ and the inputs
are disabled to prevent the leakage by any floating pin. After release of reset the IO-ports will
be set to initial value (see related DS of MB91460 series)
Note: For some MCU derivates (e.g. MB91F467D or MB91F469G) with external bus interface
the external bus function will be set by reset, independents on internal or external mode vector
fetch. In case of single chip mode the external bus function is active until any user program
overwrites the related PFR’s from external bus to GPIO function. The initial values of external
bus are configured as following:
GPIO
XBUS
Initial function
Initial state
P00-P03 D0-D31 XBUS Input
HiZ
P04-P07 A0-A31 XBUS Output
high
P08-P10 Bus
control XBUS Output
high
P10_4 MCLKO XBUS
Output
CLKT
P10_5 MCLKI XBUS Input
MONCLK MONCLK XBUS Output
HiZ
P11-P35 - GPIO
Input
HiZ
Note: If the external bus pins should be used as GPIO function the address and bus control
lines are driven as output at high level directly after the reset initialization.
