Freescale Semiconductor MSC8144E, Reference Manual

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MSC8144E Reference Manual, Rev. 3
12-56 Freescale Semiconductor
DDR SDRAM Memory Controller
DDR_ERR_INJECT sets the ECC mask, enables errors to be written to ECC memory, and
allows the ECC byte to mirror the most significant data byte.
12.7.22 DDR SDRAM Memory Data Path Read Capture Data High Register
(CAPTURE_DATA_HI)
CAPTURE_DATA_HI stores the high bytes of the read data path during error capture. This
register is used to read captured errors for 32-bit and 16-bit SDRAM data bus interfaces.
Table 12-36. DDR_ERR_INJECT Bit Descriptions
Bit Reset Description Settings
—
31–9
0 Reserved. Write to zero for future compatibility.
EIEN
8
0 Error Injection Enable
Enables/disables injection of errors. 0 Error injection disabled.
1 Error injection enabled. This
applies to the data mask bits
and to the ECC mask bits.
EEIM
7–0
0 ECC Error Injection Mask (0:7)
Setting a mask bit causes the corresponding ECC bit to
be inverted during memory bus writes.
CAPTURE_DATA_HI DDR SDRAM Memory Data Path Offset 0x0E20
Read Capture Data High Register
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CDHMSB —
Type R/W R
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CDHLSB —
Type R/W R
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 12-37. CAPTURE_DATA_HI Bit Descriptions
Bit Reset Description
CDHMSB
31–24
0 Error Capture High Data Path
Captures bits 0–7 of the data path when errors are detected.
—
23–16
0 Reserved. Write to zero for future compatibility.
CDHlSB
15–8
0 Error Capture High Data Path
Captures bits 8–15 of the data path when errors are detected.
—
7–0
0 Reserved. Write to zero for future compatibility.