Freescale Semiconductor MPC8260-TCOM, User Manual

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MPC8260TCOM User’s Manual PRELIMINARY
SUPPORT INFORMATION
38
C16 PB16
MIIRXER
FE_2 MIIRXER signal on FCC3.
C17 PB15
MIITXER/TDMC1-L1TXD
T1_3 TXD signal or FE_2 MIITXER signal on FCC3 .
C18 PB14
MIITXEN/TDMC1-L1RXD
T1_3 RXD signal or FE_2 MIITXEN signal on FCC3 .
C19 PB13
MIICOL/DS3-TXD1/TDMC1-L1TSYNC
T1_3 TSYNC or FE_2 MIICOL signal on FCC3 or DS3_2 TXD1 signal on FCC3.
C20 PB12
MIICRS/TDMC1-L1RSYNC
T1_3 RSYNC signal or FE_2 MIICRS signal on FCC3.
C21 PB11
MIIRXD3/TDMD1-L1TXD
T1_3 TXD signal or FE_2 MIIRXD3 signal on FCC3.
C22 PB10
MIIRXD2/TDMD1-L1RXD
T1_4 RXD signal or FE_2 MIIRXD2 signal on FCC3.
C23 PB9
MIIRXD1/DS3-TXD2/TDMD1-L1TSYNC
T1_4 TSYNC signal or FE_2 MIIRXD1 signal on FCC3 or DS3_2 TXD2 signal. If T1_4 is enable
DS3_2 is disable.
C24 PB8
MIIRXD0/TDMD1-L1RSYNC
T1_4 RSYNC signal or FE_2 MIIRXD0 signal on FCC3.
C25 PB7
MIITXD0/DS3-TXD0/TDMA2-L1TXD
T1_5 TXD signal or FE_2 MIITXD0 signal on FCC3 or DS3_2 TXD0 signal on FCC3. If T1_5 is
enable then DS3_2 is disable.
C26 PB6
MIITXD1/DS3-RXD0/TDMA2-L1RXD
T1_5 RXD signal or FE_2 MIITXD1 signal on FCC3 or DS3_2 RXD0 signal on FCC3. If T1_5 is
enable then DS3_2 is disable.
C27 PB5
MIITXD2/DS3-TXSYNC//TDMA2-L1TSYNC
T1_5 TSYNC signal or FE_2 MIITXD2 signal on FCC3 or DS3_2 TSYNC signal on FCC3. If T1_5
is enable then DS3_2 is disable.
C28 PB4
MIITXD3/DS3-RXSYNC/TDMA2-L1RSYNC
T1_5 RSYNC signal or FE_2 MIITXD3 signal on FCC3 or DS3_2 RSYNC signal on FCC3. If T1_5
is enable then DS3_2 is disable.
C29 GND through these pins the TCOM gets POWER (GND).
C30 GND
C31 GND
C32 GND
Table 8: P1 PORT C (D row)
D
D1
PC31
DS3-RXCLK(clock1)/TDMA1-RXCLK(clock1)
T1_1 RXCLK signal or DS3_1 RXCLK signal on FCC2
D2
PC30
TDMA1-TXCLK(clock2)
T1_1 TXCLK signal.
D3
PC29
TDMC2-RXCLK(clock3)
T1_7 RXCLK signal.
D4
PC28
TDMC2-TXCLK(clock4)
T1_7 TXCLK signal.
D5
PC27
DS3-RXCLK(clock5)/TDMC1-L1RXCLK(clock5)
T1_3 RXCLK signal or DS3_2 RXCLK on FCC3
D6
PC26
DS3-TXCLK(clock6)/TDMC1-L1TXCLK(clock6)
T1_3 TXCLK signal or DS3_2 TXCLK on FCC3.
D7
PC25
TDMD1-RXCLK(clock7)
T1_4 RXCLK signal.
D8
PC24
TDMD1-TXCLK(clock8)
T1_4 TXCLK signal
D9
PC23
TDMB1-RXCLK(clock9)
T1_2 RXCLK signal.
D10
PC22
TDMB1-TXCLK(clock10)
T1_2 TXCLK signal.
D11
PC21
MIIRXCLK(clock11)/ATM8-RxClk
FE_1 MIIRXCLK signal on FCC1 or ATM8 RxClk signal on ADS.
Table 7: P1 PORT B (C row)
C
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Freescale Semiconductor, Inc.
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