Freescale Semiconductor MPC5565, Reference Manual

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Deserial Serial Peripheral Interface (DSPI)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
19-54 Freescale Semiconductor
Table 19-25 shows an example of the computed delay after transfer.
19.4.6.5 Peripheral Chip Select Strobe Enable (PCSS)
The PCSS signal provides a delay to allow the PCS x signals to settle after transitioning thereby avoiding
glitches. When the DSPI is in master mode and PCSSE bit is set in the DSPI x _MCR, PCSS provides a
signal for an external demultiplexer to decode the PCS x [0:4] signals into as many as 32 glitch-free PCS x
signals.
Figure 19-31 shows the timing of the PCSS signal relative to PCS signals.
Figure 19-31. Peripheral Chip Select Strobe Timing
The delay between the assertion of the PCS x signals and the assertion of PCSS is selected by the PCSSCK
field in the DSPI x _CTAR based on the following formula:
At the end of the transfer the delay between PCSS negation and PCS x negation is selected by the PASC
field in the DSPI x _CTAR based on the following formula:
Table 19-26 shows an example of the computed t
PCSSCK
delay.
Table 19-25. Delay after Transfer Computation Example
PDT
Prescaler
Value
DT
Scaler
Value
f
SYS
Delay after Transfer
0b01 3 0b1110 32768 100 MHz 0.98 ms
Table 19-26. Peripheral Chip Select Strobe Assert Computation Example
PCSSCK Prescaler
f
SYS
Delay before Transfer
0b11 7 100 MHz 70.0 ns
PCSS
PCSx
t
PCSSCK
t
PASC
tPCSSCK =
PCSSCK
×
f
SYS
1
tPASC =
PASC
×
f
SYS
1