Freescale Semiconductor MPC5565, Reference Manual

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Deserial Serial Peripheral Interface (DSPI)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
19-52 Freescale Semiconductor
Figure 19-29 shows the CSI deserialization logic.
Figure 19-29. CSI Deserialization Diagram
19.4.6 DSPI Baud Rate and Clock Delay Generation
The SCK x frequency and the delay values for serial transfer are generated by dividing the system clock
frequency by a prescaler and a scaler with the option of doubling the baud rate.
Figure 19-30 shows conceptually how the SCK signal is generated.
Figure 19-30. Communications Clock Prescalers and Scalers
19.4.6.1 Baud Rate Generator
The baud rate is the frequency of the serial communication clock (SCK x ). The system clock is divided by
a baud rate prescaler (defined by DSPI x _CTAR[PBR]) and baud rate scaler (defined by
DSPI x _CTAR[BR]) to produce SCK x with the possibility of doubling the baud rate. The DBR, PBR, and
BR fields in the DSPI x _CTARs select the frequency of SCK x using the following formula:
Table 19-22 shows an example of a computed baud rate.
Table 19-22. Baud Rate Computation Example
f
SYS
PBR
Prescaler
Value
BR
Scaler
Value
DBR
Value
Baud Rate
100 MHz 0b00 2 0b0000 2 0 25 Mb/sec
20 MHz 0b00 2 0b0000 2 1 10 Mb/sec
SIN
Control
logic
0 1 • • • • • 15
Shift register
16
Slave bus interface
Parallel
DSI deserialization
data register
outputs
16
Transfer
priority logic
16
RX FIFO
(P_OUT)
16
Prescaler
1
Scaler
1 + DBR
System Clock SCKx
SCK baud rate
f
SYS
PBRPrescalerValue
----------------------------------------------------------
1 DBR +
BRScalerValue
--------------------------------------------
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