Freescale Semiconductor MPC5565, Reference Manual

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Deserial Serial Peripheral Interface (DSPI)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
19-2 Freescale Semiconductor
19.1.1 Block Diagram
A block diagram of the DSPI is shown in Figure 19-1 .
Figure 19-1. DSPI Block Diagram
19.1.2 Overview
The DSPI supports pin count reduction through serialization and deserialization of eTPU channels, eMIOS
channels, and memory-mapped registers. Incoming serial data may be used to trigger external interrupt
requests through DSPI deserialized output connections to the SIU. The channels and register content are
transmitted using an SPI protocol. There are three identical DSPI modules (DSPI B, DSPI C, and DSPI D)
on the device.
CMD
DMA and interrupt control
TX FIFO RX FIFO
TX data RX data
16
16
Shift register
SOUT x
SPI
SPI and DSI baud rate,
delay and transfer
control
CSI
priority
logic
TXSS
DSI
DSPI BIU
16
From eTPU
and eMIOS
output channels
16
To eTPU or
eMIOS
input channels
SIU_DISR
SIN x
SCK x
PCS x [0] / SS x
PCS x [1:4]
PCS x [5] / PCSS x
INTC eDMA Slave interface
4