Freescale Semiconductor MPC5565, Reference Manual

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Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 18-13
18.3.2 eQADC Register Descriptions
Base + 0x310–
Base + 0x33C — Reserved —
Base + 0x340–
Base + 0x34C EQADC_RF1R n eQADC RFIFO1 registers 0–3 32
Base + 0x350–
Base + 0x37C — Reserved —
Base + 0x380–
Base + 0x38C EQADC_RF2R n eQADC RFIFO2 registers 0–3 32
Base + 0x390–
Base + 0x3BC — Reserved —
Base + 0x3C0–
Base + 0x3CC EQADC_RF3R n eQADC RFIFO3 registers 0–3 32
Base + 0x3D0–
Base + 0x3FC — Reserved —
Base + 0x400–
Base + 0x40C EQADC_RF4R n eQADC RFIFO4 registers 0–3 32
Base + 0x410–
Base + 0x43C — Reserved —
Base + 0x440–
Base + 0x44C EQADC_RF5R n eQADC RFIFO5 registers 0–3 32
Base + 0x450–
Base + 0x7FC — Reserved —
Table 18-2. eQADC Memory Map (continued)
Address Register Name Register Description Bits