Freescale Semiconductor MPC5565, Reference Manual

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Boot Assist Module (BAM)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 15-11
Refer to Figure 15-5 for details of FlexCAN bit timing.
Figure 15-5. FlexCAN Bit Timing
The eSCI is configured for 1 start bit, 8 data bits, no parity and 1 stop bit and to operate at a baud rate equal
to the system clock divided by 1250. Refer to
Table 15-7 for examples of baud rates.
The BAM ignores the following eSCI errors:
• Overrun errors
• Noise errors
• Framing errors
• Parity errors
All data received is assumed to be good and is echoed out on the TXD signal. It is the responsibility of the
host computer to compare the echoes with the sent data and restart the process if an error is detected.
Upon receiving a valid FlexCAN message with an ID equal to 0x011 that contains 8 data bytes, or a valid
eSCI message, the BAM uses a serial boot submode: FlexCAN serial boot mode, or eSCI serial boot mode.
Table 15-7. Serial Boot Mode—Baud Rate and Watchdog Summary
Crystal
Frequency
(MHz)
System Clock
Frequency
(MHz)
SCI Baud Rate
(baud)
FlexCAN Baud
Rate
(baud)
Watchdog
Timeout Period
(seconds)
f
ref_crystal
f
sys
= 1.5 x f
ref_crystal
f
sys
/ 1250 f
sys
/ 60 2.5 x 2
27
/ f
sys
8 12 9600 200 K 67.1
12 18 14400 300 K 44.7
16 24 19200 400 K 33.6
20 30 24000 500 K 26.8
SYNC_SEG Time segment 1 Time segment 2
Sample point
NRZ signal
Transmit point
1
time quanta time quanta time quanta
9 2
1 bit time
1 time quanta = 5 system clock periods = 3 1/3 crystal clock periods (with PLL enabled)