Freescale Semiconductor MPC5565, Reference Manual

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System Integration Unit (SIU)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 6-81
Refer to Table 6-19 for bit field definitions. Table 6-96 lists the PA fields for
EMIOS[20:21]_GPIO[199:200].
6.3.1.104 Pad Configuration Register 201 (SIU_PCR201)
The SIU_PCR201 register controls the function, direction, and electrical attributes of
EMIOS[22]_GPIO[201]. Both the input and output functions of EMIOS[22] are connected.
Figure 6-102. EMIOS[22]_GPIO[201] Pad Configuration Register (SIU_PCR201)
Refer to Table 6-19 for bit field definitions. Table 6-97 lists the PA fields for EMIOS[22]_GPIO[201].
Table 6-96. PCR199–200 PA Field Definition
PA Field Pin Function
0b00 GPIO[199:200]
0b01 EMIOS[20:21]
0b10 Invalid value
0b11 EMIOS[20:21]
Address: Base + 0x01D2 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA
1
1
The PA function using the 0b10 value is disabled on this device.
OBE
2
2
The OBE bit must be set to 1 for EMIOS[22] or GPIO[201] when configured as output.
IBE
3
3
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[22] or GPIO[201] when configured as input.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 U
4
4
The weak pullup/down selection at reset for the EMIOS[22] pin is determined by the WKPCFG pin.
Table 6-97. PCR201 PA Field Definition
PA Field Pin Function
0b00 GPIO[201]
0b01 EMIOS[22]
0b10 Invalid value
0b11 EMIOS[22]