System Integration Unit (SIU)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor
6-31
6.3.1.21
Pad Configuration Registers 49 (SIU_PCR49)
The SIU_PCR49 register controls the function, direction, and electrical attributes of
DATA[21]_GPIO[49].
Figure 6-22. DATA[21]_GPIO[49] Pad Configuration Registers (SIU_PCR49)
Refer to
lists the PA fields for DATA[21]_GPIO[49].
6.3.1.22
Pad Configuration Registers 50 (SIU_PCR50)
The SIU_PCR50 register controls the function, direction, and electrical attributes of
DATA[22]_GPIO[50].
Figure 6-23. DATA[22]_GPIO[50] Pad Configuration Registers (SIU_PCR50)
Address: Base + 0x00A2
Access: R/W
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
PA
OBE
1
1
When configured as DATA[21], the OBE bit has no effect.
When configured as GPDO (output), set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC
ODE
3
3
When configured as DATA[21], the ODE bit should be set to 0.
HYS
4
4
If external master operation is enabled, clear the HYS bit to 0.
0
0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as DATA[21].
WPS
W
RESET:
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
Table 6-26. PCR49 PA Field Definition
PA Field
Pin Function
0b00
GPIO[49]
0b01
DATA[21]
0b10
Invalid value
0b11
DATA[21]
Address: Base + 0x00A4
Access: R/W
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
PA
OBE
1
1
When configured as DATA[22], the OBE bit has no effect. When configured as GPDO, the OBE bit should be set to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC
ODE
3
3
When configured as DATA[22], clear the ODE bit to 0.
HYS
4
4
If external master operation is enabled, clear the HYS bit to 0.
0
0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as DATA[22].
WPS
5
W
RESET:
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
Summary of Contents for MPC5565
Page 18: ...MPC5565 Microcontroller Reference Manual Devices Supported MPC5565 MPC5565 RM Rev 1 0 09 2007...
Page 34: ...MPC5565 Reference Manual Rev 1 0 Freescale Semiconductor 15...
Page 35: ...MPC5565 Reference Manual Rev 1 0 16 Freescale Semiconductor...
Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...
