The maximum frequency of the EzPort clock is half the system clock frequency for all
commands, except when executing the Read Data commands. When executing the Read
Data commands, the EzPort clock has a maximum frequency of 1/8 the system clock
frequency.
30.2.2 EzPort Chip Select (EZP_CS)
EZP_CS is the chip select for signaling the start and end of serial transfers. While
EZP_CS is asserted, if the microcontroller's reset out signal is negated, then EzPort is
enabled out of reset; otherwise EzPort is disabled. After EzPort is enabled, asserting
EZP_CS starts a serial data transfer, which continues until EZP_CS is negated again. The
negation of EZP_CS indicates that the current command has finished and resets the
EzPort state machine, so that EzPort is ready to receive the next command.
30.2.3 EzPort Serial Data In (EZP_D)
EZP_D is the serial data in for data transfers. EZP_D is registered on the rising edge of
EZP_CK. All commands, addresses, and data are shifted in most significant bit first.
When the EzPort is driving output data on EZP_Q, the data shifted in EZP_D is ignored.
30.2.4 EzPort Serial Data Out (EZP_Q)
EZP_Q is the serial data out for data transfers. EZP_Q is driven on the falling edge of
EZP_CK. It is tri-stated unless EZP_CS is asserted and the EzPort is driving data out. All
data is shifted out most significant bit first.
30.3 Command definition
The EzPort receives commands from an external device and translates the commands into
flash memory accesses. The following table lists the supported commands.
Table 30-2. EzPort commands
Command
Description
Code
Address
Bytes
Data Bytes
Accepted when
secure?
WREN
Write Enable
0x06
0
0
Yes
WRDI
Write Disable
0x04
0
0
Yes
RDSR
Read Status Register
0x05
0
1
Yes
Table continues on the next page...
Command definition
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
660
Freescale Semiconductor, Inc.
