MCG_C8 field descriptions (continued)
Field
Description
clock indication. The CME1 bit should be set to a logic 1 when the MCG is in an operational mode that
uses the RTC as its external reference clock or if the RTC is operational. CME1 bit must be set to a logic 0
before the MCG enters any Stop mode. Otherwise, a reset request may occur when in Stop mode. CME1
should also be set to a logic 0 before entering VLPR or VLPW power modes.
0
External clock monitor is disabled for RTC clock.
1
External clock monitor is enabled for RTC clock.
4–1
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
0
LOCS1
RTC Loss of Clock Status
This bit indicates when a loss of clock has occurred. This bit is cleared by writing a logic 1 to it when set.
0
Loss of RTC has not occur.
1
Loss of RTC has occur
25.4 Functional description
25.4.1 MCG mode state diagram
The nine states of the MCG are shown in the following figure and are described in
. The arrows indicate the permitted MCG mode transitions.
Functional description
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
548
Freescale Semiconductor, Inc.
