22.3.8 Set Enable Request Register (DMA_SERQ)
The SERQ provides a simple memory-mapped mechanism to set a given bit in the ERQ
to enable the DMA request for a given channel. The data value on a register write causes
the corresponding bit in the ERQ to be set. Setting the SAER bit provides a global set
function, forcing the entire contents of ERQ to be set. If the NOP bit is set, the command
is ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this
register return all zeroes.
Address: 4000_8000h base + 1Bh offset = 4000_801Bh
Bit
7
6
5
4
3
2
1
0
Read
0
0
0
Write
Reset
0
0
0
0
0
0
0
0
DMA_SERQ field descriptions
Field
Description
7
NOP
No Op enable
0
Normal operation
1
No operation, ignore the other bits in this register
6
SAER
Set All Enable Requests
0
Set only the ERQ bit specified in the SERQ field
1
Set all bits in ERQ
5–4
Reserved
This field is reserved.
3–0
SERQ
Set Enable Request
Sets the corresponding bit in ERQ.
Memory map/register definition
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
446
Freescale Semiconductor, Inc.
