Peripheral Doze can therefore be used to disable selected bus masters or slaves for the
duration of WAIT or VLPW mode. It can also be used to disable selected bus slaves
immediately on entry into any stop mode (or Compute Operation), instead of waiting for
the bus masters to acknowledge the entry as part of the stop entry sequence. Finally, it
can be used to disable selected bus masters or slaves that should remain inactive during a
DMA wakeup.
If the flash memory is not being accessed during WAIT and PSTOP modes, then the
Flash Doze mode can be used to reduce power consumption, at the expense of a slightly
longer wake-up when executing code and vectors from flash. It can also be used to reduce
power consumption during Compute Operation when executing code and vectors from
SRAM.
7.2.5 Clock Gating
To conserve power, the clocks to most modules can be turned off using the SCGCx
registers in the SIM module. These bits are cleared after any reset, which disables the
clock to the corresponding module. Prior to initializing a module, set the corresponding
bit in the SCGCx register to enable the clock. Before turning off the clock, make sure to
disable the module. For more details, refer to the clock distribution and SIM chapters.
7.3 Power Modes Description
The power management controller (PMC) provides multiple power options to allow the
user to optimize power consumption for the level of functionality needed.
Depending on the stop requirements of the user application, a variety of stop modes are
available that provide state retention, partial power down or full power down of certain
logic and/or memory. I/O states are held in all modes of operation. The following table
compares the various power modes available.
For Run and VLPR mode there is a corresponding wait and stop mode. Wait modes are
similar to ARM sleep modes. Stop modes (VLPS, STOP) are similar to ARM sleep deep
mode. The very low power run (VLPR) operating mode can drastically reduce runtime
power when the maximum bus frequency is not required to handle the application needs.
Stop mode entry is not supported directly from HSRUN and requires transition to Run
prior to an attempt to enter a stop mode.
Chapter 7 Power Management
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
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