In Stop mode, if the Transmitter Stop Enable (TCSR[STOPE]) bit is clear, the transmitter
is disabled after completing the current transmit frame, and, if the Receiver Stop Enable
(RCSR[STOPE]) bit is clear, the receiver is disabled after completing the current receive
frame. Entry into Stop mode is prevented–not acknowledged–while waiting for the
transmitter and receiver to be disabled at the end of the current frame.
3.9.6.3.2 Low-leakage modes
When entering low-leakage modes, the Stop Enable (TCSR[STOPE] and
RCSR[STOPE]) bits are ignored and the SAI is disabled after completing the current
transmit and receive Frames. Entry into stop mode is prevented (not acknowledged)
while waiting for the transmitter and receiver to be disabled at the end of the current
frame.
3.10 Human-machine interfaces
3.10.1 GPIO configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Signal
multiplexing
Register
access
Peripheral
bridge
Module signals
GPIO controller
Crossbar
switch
Transfers
Figure 3-55. GPIO configuration
Table 3-72. Reference links to related information
Topic
Related module
Reference
Full description
GPIO
System memory map
Clocking
Table continues on the next page...
Human-machine interfaces
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
134
Freescale Semiconductor, Inc.