UARTx_C5 field descriptions (continued)
Field
Description
Configures the receiver data register full flag, S1[RDRF], to generate interrupt or DMA requests if C2[RIE]
is set.
NOTE: If C2[RIE] is cleared, and S1[RDRF] is set, the RDRF DMA and RDFR interrupt request signals
are not asserted, regardless of the state of RDMAS.
0
If C2[RIE] and S1[RDRF] are set, the RDFR interrupt request signal is asserted to request an interrupt
service.
1
If C2[RIE] and S1[RDRF] are set, the RDRF DMA request signal is asserted to request a DMA
transfer.
4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3–0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
46.3.13 UART Extended Data Register (UARTx_ED)
This register contains additional information flags that are stored with a received
dataword. This register may be read at any time but contains valid data only if there is a
dataword in the receive FIFO.
NOTE
• The data contained in this register represents additional
information regarding the conditions on which a dataword
was received. The importance of this data varies with the
application, and in some cases maybe completely optional.
These fields automatically update to reflect the conditions
of the next dataword whenever D is read.
• If S1[NF] and S1[PF] have not been set since the last time
the receive buffer was empty, the NOISY and PARITYE
fields will be zero.
Address: Base a Ch offset
Bit
7
6
5
4
3
2
1
0
Read
Write
Reset
0
0
0
0
0
0
0
0
UARTx_ED field descriptions
Field
Description
7
NOISY
The current received dataword contained in D and C3[R8] was received with noise.
Table continues on the next page...
Chapter 46 Universal Asynchronous Receiver/Transmitter (UART)
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
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