Document Number: UMS-21100
Rev. A
07/2006
M9328MX21ADSE
Application Development System
User’s Manual
Page 1: ...Document Number UMS 21100 Rev A 07 2006 M9328MX21ADSE Application Development System User s Manual...
Page 2: ......
Page 3: ...2 7 2 3 7 Touchscreen ADC 2 8 2 3 8 CD Quality CODEC 2 9 2 3 9 Keypad 2 9 2 3 10 Memory Mapped I O 2 10 2 3 11 Audio Indicator Buzzer 2 12 2 3 12 LED Indicators 2 12 2 4 Using The Board Connectors 2 1...
Page 4: ...3 6 Ethernet Connector 3 21 3 7 USB OTG Connector 3 22 3 8 NAND Flash Connector 3 22 3 9 External Keypad Connector 3 25 3 10 LCD Panel Connector 3 26 3 11 TV Encoder Connector 3 27 3 12 SD MMC Connec...
Page 5: ...res and capabilities of the ADS Chapter 2 Configuration and Operation contains configuration information connection descriptions and other operational information that may be useful during the develop...
Page 6: ...Dual Universal Asynchronous Receiver Transmitter I2 C Inter Integrated Circuit ICE In Circuit Emulator I O Input Output IrDA Infrared Data Association JTAG Joint Test Access Group LCD Liquid Crystal...
Page 7: ...VDC Multi ICE debug support Two 8 MB 16 bit Burst Flash memory devices configured as one 32 MB 32 bit device Two 16 MB 16 bit SDRAM devices configured as one 64 MB 32 bit device High speed expansion...
Page 8: ...y Ethernet activity and two LEDs for user defined status indiction Universal power supply with 5 0 volt output 2 4 Amperes USB cable RS 232 serial cable Two RJ 45 Ethernet cables network and crossover...
Page 9: ...onnector for the External UART DCE pinout P4 USB OTG connector P5 Keypad module connector P6 SD MMC card connector P7 LCD touch panel connector TV ENCODER CON LCD CON 5V IN P8 F1 SW1 P9 P3 P2 P1 P4 U1...
Page 10: ...een LED2 3 volt power LED green LED3 and LED4 General purpose LEDs orange LED5 LED6 Ethernet activity LEDs green orange LED7 external bus activity LED red U16 IrDA transceiver VR1 emulate the battery...
Page 11: ...Reset Switch SW2 Push to reset the M9328MX21ADSE Peripheral Selection Switch S1 S1 The UART1 and UART4 transceivers are forced enabled the IrDA module is enabled by software Nexus is disabled ARM mode...
Page 12: ...nected to any I O signal and cannot be controlled or read J3 DTR is forced active positive SD2_D0 is unused J4 DSR cannot be read SD2_D1 is unused J5 CD cannot be read SD2_D2 is unused J6 RI cannot be...
Page 13: ...example configuration S2 1 through S2 4 configure the system to boot from the 8 bit NAND Flash S2 5 and S2 6 are always set to OFF S2 7 and S2 8 are set for user defined functions Figure 2 2 Switch S2...
Page 14: ...Ethernet port USB series mini AB connector UART1 UART2 IrDA Ext UART LEDs Buzzer Boot mode UARTs IrDA selection 1 wire Interface Silicon Board revision register S W readable DIP switches Audio CODEC...
Page 15: ...of the associated chip selects software can access the same physical memory location at more than one range of addresses For instance SDRAM uses DQM3_EB3 A2 A24 D0 15 FLASH_RST RESET A0 A22 D0 15 8MX...
Page 16: ...ly chip is enabled by the USB_PWR signal For details on the operation of the USB interface refer to the i MX21 data sheet Figure 2 6 shows the USB interface connection Figure 2 6 USB OTG Interface 2 3...
Page 17: ...t and receive filters and operates in I O mode Figure 2 8 shows the Ethernet interface Buffer EN IrDA EN UART1_TXD1 UART1_RXD1 UART1_CTS1 UART1_RTS1 RS232 Transceiver P1 UART1 EN VCC GND S1 1 Software...
Page 18: ...i MX21 communicates with the ADC via the CSPI1 interface Setting S1 7 to ON connects CSPI1_SS0 to the ADC chip select Setting S1 8 to ON connects the ADC interrupt out to UART3_CTS Figure 2 9 shows t...
Page 19: ...s to prevent ghost key presses The keys are labeled with numeric cursor control soft key and spare key functions but the actual functionality is determined by user software The default keypad can be r...
Page 20: ...with each data bit Table 2 7 Input Buffer Signals BIT Signal Description BIT 0 SD_WP Secure Data Write Protect BIT 1 SW_SEL Software readable switch BIT 2 RESET_E_UART External UART Reset BIT 3 RESET_...
Page 21: ...controller Reset U9 BIT 4 CSI_CTL2 Image Sensor control 2 BIT 5 CSI_CTL1 Image Sensor control 1l BIT 6 CSI_CTL0 Image Sensor control 0 BIT 7 UART1_EN UART1 transceiver enable BIT 8 UART4_EN UART4 tra...
Page 22: ...STAT 2 User status controlled by Output BIT 15 LED4 Orange STAT 1 User status controlled by Output BIT 14 LED5 Green ACTIVE Blinking indicates LAN Activity LED6 Orange LINK Link good or host controlle...
Page 23: ...adphone Standard 3 5 mm connector for stereo audio This is the amplified stereo output of the WM8731SEDS Use headphones with a 16 to 32 ohms impedance P13 TV encoder This connector is used with P7 tog...
Page 24: ...1 2 3 4 5 6 7 8 9 0 Left Action Right Down Up App1 App2 App3 App4 Extra 2 Extra 3 Extra 4 Extra 5 Extra 1 Vol Up Vol Down Power Record Send Home Key 1 Key 2 End Back 34 CONDUCTOR TFT LCD PANEL 240 x...
Page 25: ...factory and normally does not require adjustment However if the TFT LCD display flickers you may adjust VR1 to stabilize the display Use a suitable flat head or phillips head screwdriver Because the...
Page 26: ...2 5 5 Using Image Sensor Daughter Card Connector PE1 is pre configured to operate directly with the IM8012 image sensor daughter card supplied with the ADS Communication with this card takes place thr...
Page 27: ...data sheet available at http www focusinfo com CAUTION Make sure that input power is disconnected or switched off before the TV encoder card is installed Connecting the card with power applied can dam...
Page 28: ...Configuration and Operation M9328MX21ADSE User s Manual Rev A 2 18 Freescale Semiconductor...
Page 29: ...tted data signals are referred to as TXD regardless of which RS 232 connector is being illustrated Also the use of _B at the end of a signal name indicates that the active state of the signal is logic...
Page 30: ...5V P5V 45 46 USBH1_FS USBH1_TXDP 47 48 USB_OC_B USBH1_TXDM 49 50 USBH1_OE_B USBH1_RXDP 51 52 USBH_ON_B USBH1_RXDM 53 54 USB_PWR USB_BYP_B 55 56 USBOTG_EN P5V 57 58 B_DQM3_EB3_B TP22 59 60 GND CLK_26 6...
Page 31: ...DATA 17 RED BIT 5 Output data to LCO 13 LD16_R4 LCD DATA 16 RED BIT 4 Output data to LCD 14 LD15_R3 LCD DATA 15 RED BIT 3 Output data to LCD 15 LD14_R2 LCD DATA 14 RED BIT 2 Output data to LCD 16 LD1...
Page 32: ...VDC power 46 USBH1_FS USB FULL SPEED 47 USBH1_TXDP USB TRANSMITTED DATA PLUS output 48 USB_OC_B USB OVER CURRENT input low 49 USBH1_TXDM USB TRANSMITTED DATA MINUS output 50 USBH1_OE_B USB OUTPUT ENA...
Page 33: ...sor 81 POR_B POWER ON RESET 82 RTCK_GPIO RETURN CLOCK JTAG signal can be general purpose I O 83 CLKMODE0 CLOCK MODE BIT 0 Selects PLL bypass modes 84 CLKMODE1 CLOCK MODE BIT 1 Selects PLL bypass modes...
Page 34: ...6 B_D11 BUFFERED DATA 11 Buffered bidirectional data bus bit 107 B_D2 BUFFERED DATA 2 Buffered bidirectional data bus bit 108 B_D10 BUFFERED DATA 10 Buffered bidirectional data bus bit 109 B_D1 BUFFER...
Page 35: ...OSI 45 46 CSPI1_MISO CSPI1_SCLK 47 48 CSPI1_SS0 CSPI1_SS1 49 50 CSPI1_SS2 CSPI1_RDY 51 52 VCC CSPI2_MOSI 53 54 CSPI2_MISO CSPI2_SCLK 55 56 CSPI2_SS0 CSPI2_SS1 57 58 CSPI2_SS2 P5V 59 60 P5V VCC 61 62 C...
Page 36: ...ata bit to SD MMC card bidirectional 14 SD2_D0 SD MMC DATA BIT 2 Serial data bit to SD MMC card bidirectional 15 CSI_HSYNC CMOS SENSOR INTERFACE HORIZONTAL SYNC Control input 16 CSI_VSYNC CMOS SENSOR...
Page 37: ...K Serial transmit clock bidirectional output in master mode input in slave mode 42 SAP_RXD SYCHRONOUS AUDIO PORT RECEIVED DATA Serial data input 43 SAP_FS SYCHRONOUS AUDIO PORT FRAME SYNC Bidirectiona...
Page 38: ...signal use to scan a keypad 76 KP_ROW3 KEYPAD ROW 3 Bidirectional signal use to scan a keypad 77 KP_COL2 KEYPAD COLUMN 2 Bidirectional signal use to scan a keypad 78 KP_ROW2 KEYPAD ROW 2 Bidirectiona...
Page 39: ...Reserved 105 B_D18 BUFFERED DATA 18 Buffered data bidirectional Reserved 106 B_D19 BUFFERED DATA 19 Buffered data bidirectional Reserved 107 B_D20 BUFFERED DATA 20 Buffered data bidirectional Reserve...
Page 40: ...es signal descriptions for the connector Figure 3 4 shows pin assignments for the PK2 connector and Table 3 4 provides signal descriptions for the connector Figure 3 3 CPU to Option Card PK1 Connector...
Page 41: ...OCK OUT Clock out from the processor NC if R44 not installed 15 CS3_B CHIP SELECT 3 Chip select signal active low output 16 CS4_B CHIP SELECT 4 Chip select signal active low output 17 51 P1 8v 1 8 VDC...
Page 42: ...dressing external devices 46 A9 ADDRESS BIT 9 Output line for addressing external devices 47 A16 ADDRESS BIT 16 Output line for addressing external devices 48 A7 ADDRESS BIT 7 Output line for addressi...
Page 43: ...9 10 NFIO7 NFIO6 11 12 NFRE_B NFWE_B 13 14 P1 8V NFALE 15 16 NFCLE NFWP_B 17 18 NFCE_B NFRB 19 20 PC_PWRON D23 21 22 D24 D22 23 24 D25 D21 25 26 D26 D20 27 28 D27 D19 29 30 D28 D18 31 32 D29 D17 33 3...
Page 44: ...to report battery status 14 53 P1 8V 1 8 VDC power 15 NFALE PC_OE PCMCIA OUTPUT ENABLE Output used to enable memory read data 16 NFCLE PC_POE PCMCIA Buffer OUTPUT ENABLE Output used tri state control...
Page 45: ...exed address bit to SDRAM 45 A4 ADDRESS BIT 4 Output line for addressing external devices 46 DQM2_EB2_B PC_REG PCMCIA REGISTER SELECT Output to select Attribute Memory 47 A5 ADDRESS BIT 5 Output line...
Page 46: ...signal descriptions for the connector Figure 3 5 Connector P1 UART1 DCE Pin Assignments Table 3 5 Connector P1 UART1 DCE Signal Descriptions Pin s Signal Description 1 CD CARRIER DETECT RS 232 output...
Page 47: ...RECEIVED DATA RS 232 serial data input signal connected to USBH1_TXDP when UART4 is enable 3 TXD TRANSMITTED DATA RS 232 serial data output signal connected to USBH1_TXDM when UART4 is enabled 4 DTR D...
Page 48: ...Assignments Table 3 7 Connector P3 EXT UART DCE Signal Descriptions Pin s Signal Description 1 CD CARRIER DETECT RS 232 output signal pulled active positive 2 TXD TRANSMITTED DATA RS 232 serial data o...
Page 49: ...D 5 TDI TEST DATA INPUT Serial data output line sampled on the rising edge of the TCK signal 7 TMS TEST MODE SELECT Output signal that sequences the target s JTAG state machine sampled on the rising e...
Page 50: ...e ADS to interface with a NAND Flash module Figure 3 12 and Figure 3 12 show pin assignments Table 3 12 and Table 3 12 provide signal descriptions for the connectors Figure 3 11 NAND Flash Connector P...
Page 51: ...t 16 NFWP_B NAND FLASH WRITE PROTECT 17 GND GOUND 18 GND GOUND 19 GND GOUND 20 GND GOUND 23 NFIO4 NAND FLASH I O BIT 4 Bidirectional data transfer signal 24 A14 NFIO9 NAND FLASH I O BIT 9 Bidirectiona...
Page 52: ...3 Bidirectional data transfer signal 10 A22 NFIO12 NAND FLASH I O BIT 12 Bidirectional data transfer signal 11 NFIO4 NAND FLASH I O BIT 4 Bidirectional data transfer signal 12 A21 NFIO11 NAND FLASH I...
Page 53: ...n a keypad 6 UART2_CTS KEY_ROW7 KEYPAD ROW 7 Bidirectional signal used to scan a keypad 7 KP_COL5 KEYPAD COLUMN 5 Bidirectional signal used to scan a keypad 8 KP_ROW5 KEYPAD ROW 5 Bidirectional signal...
Page 54: ...ector P8 Signal Descriptions Pin s Signal Description 1 VCC 3 volt power 2 GND GROUND 3 OE_ACD OUTPUT ENABLE ALTERNATE CRYSTAL DIRECTION 4 FLM_VSYNC_SPS FIRST LINE MARKER VERTICAL SYNCHRONIZATION 5 LP...
Page 55: ...f PS Sharp panel dedicated signal 25 LD1_B1 LCD DATA 1 BLUE BIT 1 Output data to LCD 26 LD0_B0 LCD DATA 0 BLUE BIT 0 Output data to LCD 27 LD7_G1 LCD DATA 7 GREEN BIT 1 Output data to LCD 28 LD6_G0 LC...
Page 56: ...ol signals and SDRAM control signals Figure 3 17 shows the pin numbering for the PE1 PE2 and PE3 connectors Table 3 17 through Table 3 19 provide signal descriptions Table 3 17 covers PE1 Table 3 18 c...
Page 57: ...Serial clock bidirectional A9 CSPI2_SS1 SLAVE SELECT 1 CSPI signal bidirectional A10 CSPI2_SS2 SLAVE SELECT 2 CSPI signal bidirectional A11 A15 NC NO CONNECTION A16 B16 C16 VCC 3 VDC power B2 B15 NC N...
Page 58: ...signal A14 UART3_TXD UART3 TRANSMITTED DATA Serial output signal A15 UART2_RTS UART2 REQUEST TO SEND Active low input signal A16 UART2_CTS UART2 CLEAR TO SEND Active low output signal B1 KP_ROW5 KEYPA...
Page 59: ...irectional C8 CSPI1_RDY READY CSPI serial burst trigger active low input C9 SSI1_CLK SYCHRONOUS SERIAL INTERFACE TRANSMITTER CLOCK Bidirectional output in master mode and input in slave mode C10 SSI1_...
Page 60: ...ignal A11 SSI3_RXD SYCHRONOUS SERIAL INTERFACE RECEIVED DATA Serial input signal A12 SSI3_FS SYCHRONOUS SERIAL INTERFACE FRAME SYNC A13 SSI2_CLK SYCHRONOUS SERIAL INTERFACE TRANSMITTER CLOCK Bidirecti...
Page 61: ...AND Serial command bit to SD MMC card bidirectional C6 SD2_D3 SD MMC DATA BIT 3 Serial data bit to SD MMC card bidirectional C7 SD2_D2 SD MMC DATA BIT 2 Serial data bit to SD MMC card bidirectional C8...
Page 62: ...Support Information M9328MX21ADSE User s Manual Rev A 3 34 Freescale Semiconductor...
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Page 64: ...y particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including wi...
