Freescale Semiconductor M68HC08 series, Designer Reference Manual

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LIN Master Software Description
Designer Reference Manual DRM047 — Rev 0
48 LIN Master Software Description MOTOROLA
5.2.10 Debug Mode Program Flow
A general overview may be gained from Section 2.3.3. Debug Mode
and Figure 5-5 .
5.2.11 Debug/Programming Control
The Master Board hardware (see Appendix A. Hardware Schematics )
is prepared for using RxD, TxD, DTR and RTS RS232 signals, but
software implementation is based on RxD, TxD, and DTR signals, where
the DTR state is the determining function, i.e. either Debugging /
Programming (DTR - low level, LIN supply voltage on) or Reset (DTR -
high level, LIN supply voltage off). Similarly, on the Debug line output,
where the RSTB signal is not used, hardware allows it.
Table 5-1 shows
the Debug line pin assignments and the relationship to the RS232 line
signals.
Table 5-1. Debug Line Output
Pin number Pin name Pin type
Master Board signals
DTR - High level
(Reset)
DTR - Low level
(Debugging and
programming)
1 CLOCK Output High impedance state 19,6608MHz clock
2 GND Power Ground Ground
3 VDD Output
Connected to ground
(discharging capacitors of
Slave Board -> push supply
voltage line to 0V)
Open collector output
(transistor is turned off)
4 \IRQOUT Output
\IRQIN low level -> 0V
\IRQIN high level -> +5V
\IRQIN low level -> 0V
\IRQIN high level -> +9V
5 \IRQIN Input +5V (pull-up) +5V (pull-up)
6 RSTB
Input
(not used)
0V (pull-down) 0V (pull-down)
7 DATA Bidirectional TxD signal is held in low level
Communication is opened,
RxD and TxD signals are
held in TTL levels
8 MON1 Output High impedance state
0V
(Set by JP1 on Master Board)
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