t
ICPW
FTMCHn
t
ICPW
FTMCHn
Figure 12. Timer input capture pulse
Thermal specifications
5.3.1 Thermal operating requirements
Table 9. Thermal operating requirements
Symbol
Description
Min.
Max.
Unit
Notes
T
J
Die junction temperature
–40
125
°C
T
A
Ambient temperature
–40
105
°C
1. Maximum T
A
can be exceeded only if the user ensures that T
J
does not exceed maximum T
J
. The simplest method to
determine T
J
is: T
J
= T
A
+
θ
JA
x chip power dissipation
5.3.2 Thermal characteristics
This section provides information about operating temperature range, power dissipation,
and package thermal resistance. Power dissipation on I/O pins is usually small compared
to the power dissipation in on-chip logic and voltage regulator circuits, and it is user-
determined rather than being controlled by the MCU design. To take P
I/O
into account in
power calculations, determine the difference between actual pin voltage and V
SS
or V
DD
and multiply by the pin current for each I/O pin. Except in cases of unusually high pin
current (heavy loads), the difference between pin voltage and V
SS
or V
DD
will be very
small.
Table 10. Thermal attributes
Board type
Symbol
Description
64
LQFP
64 QFP
44
LQFP
32
LQFP
Unit
Notes
Single-layer (1S)
R
θ
JA
Thermal resistance, junction
to ambient (natural
convection)
71
61
75
86
°C/W
Four-layer (2s2p)
R
θ
JA
Thermal resistance, junction
to ambient (natural
convection)
53
47
53
57
°C/W
Table continues on the next page...
5.3
Thermal specifications
KE02 Sub-Family Data Sheet, Rev4, 10/2014.
18
Freescale Semiconductor, Inc.