Freescale Semiconductor HCS08 Series, Reference Manual

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Chapter 3 Modes of Operation
MC9S08JS16 MCU Series Reference Manual, Rev. 4
32 Freescale Semiconductor
For the XOSC to operate with an external reference when RANGE in MCGC2 is set, the LVD must be left
enabled when entering stop3.
NOTE
To get low USB suspend current, before entering USB suspend mode, we
must set ERCLKEN and EREFSTEN in MCGC2, but leave LVD disabled
in stop3.
3.6.1.2 Active BDM Enabled in Stop Mode
Entry into the active background mode from run mode is enabled if ENBDM in BDCSCR is set. This
register is described in
Chapter 17, “Development Support .” If ENBDM is set when the CPU executes a
STOP instruction, the system clocks to the background debug logic remain active when the MCU enters
stop mode. Because of this, background debug communication remains possible. In addition, the voltage
regulator does not enter its low-power standby state but maintains full internal regulation. If the user
attempts to enter stop2 with ENBDM set, the MCU will enter stop3 instead.
Most background commands are not available in stop mode. The memory-access-with-status commands
do not allow memory access, but they report an error indicating that the MCU is in stop or wait mode. The
BACKGROUND command can be used to wake the MCU from stop and enter active background mode
if the ENBDM bit is set. After entering background debug mode, all background commands are available.
3.6.2 Stop2 Mode
Stop2 mode is entered by executing a STOP instruction under the conditions as shown in Table 3-1 . Most
of the internal circuitry of the MCU is powered off in stop2, with the exception of the RAM. Upon entering
stop2, all I/O pin control signals are latched so that the pins retain their states during stop2.
Exit from stop2 is performed by asserting either wakeup pin: RESET or IRQ. When an application utilizes
the stop2 state, RESET or IRQ pin must be pre-configured as an input prior to entering stop2. There is a
direct analog connection from RESET or IRQ pad to the power management controller wakeup pin — if
configured as a GPIO output, it could prevent operation of stop2.
In addition, the RTC interrupt can wake the MCU from stop2, if enabled.
Upon wakeup from stop2 mode, the MCU starts up as from a power-on reset (POR):
• All module control and status registers are reset
• The LVD reset function is enabled and the MCU remains in the reset state if V
DD
is below the LVD
trip point (low trip point selected due to POR)
• The CPU takes the reset vector
In addition to the above, upon waking from stop2, the PPDF bit in SPMSC2 is set. This flag is used to
direct user code to go to a stop2 recovery routine. PPDF remains set and the I/O pin states remain latched
until a 1 is written to PPDACK in SPMSC2.
To maintain I/O states for pins that are configured as general-purpose I/O before entering stop2, the user
must restore the contents of the I/O port registers, which have been saved in RAM, to the port registers