FRDMKL27Z User’s Guide, Rev. 0, 02/2015
Freescale Semiconductor, Inc.
3
FRDM-KL27Z hardware overview
Figure 1. FRDM-KL27Z block diagram
The FRDM-KL27Z features two microcontrollers (MCUs): the target MCU and a serial and debug adapter
(OpenSDA) MCU. The target MCU is a Kinetis series KL27 family device, the KL27Z64VLH4. The
OpenSDA MCU is a Kinetis K series K20 family device, the K20DX128VFM5.
Features of the KL27Z64VLH4 target MCU include:
•
32-bit ARM Cortex-M0+ core
— Up to 48 MHz operation
— Single-cycle fast I/O access port
•
Memories
— 64 KB flash
— 16 KB SRAM
— 16 KB ROM with build-in bootloader
— 32 bytes regfile
•
System integration
— 4-channel DMA controller
— Watchdog
— Low-leakage wakeup unit
— SWD debug interface and Micro Trace Buffer
— Bit Manipulation Engine
•
Clocks
— 48 MHz high accuracy internal reference clock
— 8/2 MHz low power internal reference clock
