Freescale Semiconductor ColdFire MCF5211, Reference Manual

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UART Modules
MCF5213 ColdFire® Integrated Microcontroller Reference Manual, Rev. 3
Freescale Semiconductor 21-23
21.4.3.3 Remote Loop-Back Mode
In remote loop-back mode, shown in Figure 21-23 , the UART automatically transmits received data bit by
bit on the U n TXD output. The local CPU-to-transmitter link is disabled. This mode is useful in testing
receiver and transmitter operation of a remote UART. For this mode, transmitter uses the receiver clock.
Because the receiver is not active, received data cannot be read by the CPU and all status conditions are
inactive. Received parity is not checked and is not recalculated for transmission. Stop bits are sent as they
are received. A received break is echoed as received until next valid start bit is detected.
Figure 21-23. Remote Loop-Back
21.4.4 Multidrop Mode
Setting UMR1 n [PM] programs the UART to operate in a wake-up mode for multidrop or multiprocessor
applications. In this mode, a master can transmit an address character followed by a block of data
characters targeted for one of up to 256 slave stations.
Although slave stations have their receivers disabled, they continuously monitor the master’s data stream.
When the master sends an address character, the slave receiver notifies its respective CPU by setting
USR
n [RXRDY] and generating an interrupt (if programmed to do so). Each slave station CPU then
compares the received address to its station address and enables its receiver if it wishes to receive the
subsequent data characters or block of data from the master station. Unaddressed slave stations continue
monitoring the data stream. Data fields in the data stream are separated by an address character. After a
slave receives a block of data, its CPU disables the receiver and repeats the process. Functional timing
information for multidrop mode is shown in
Figure 21-24 .
CPU
Disabled
Disabled
U n RXD Input
U n TXD Input
Tx
Rx
Disabled
Disabled