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Z3 is essentially a differential pair with a third tran-
sistor used as a constant current source.
The current source is
modulated by the 9 �lliz IF signal, while the division of this current
in the differential pair is controlled by the selected Pierce os
cillator input signal.
This mixing action is analogous to that
described in paragraph 4.2.2 for the beam deflection mixer.
The
resultant difference frequency is an audio tone of 2.5 kHz
±
the
shift frequency.
It is routed to the input of the AM-FSK diode
selector circuit via audio transformer T4, and a low-pass filter.
4.2.6
AM DETECTOR AND AGC AMPLIFIER
(Refer to Figure 6-3.)
The AM Detector is an active envelope detector circ uit con
sisting of operational am�ifier Z4, and low-pass filter L2-C28-C29.
In concept, Z4 can be replaced by a diode in series with the low
pass filter.
The current drive to the output stage of Z4 is in
creased by external potentiometer R42 to the point where it is
biased near cutoff and approximates a diode rectifier.
However,
even though the output stage is nearly cut off, all other stages
of Z4 are operating in their linear range and can provide gain for
small signal inputs.
The detected output from Z4 is filtered by
the low-pass filter to produce an audio de output to the bandwidth
selector circuit of the AGC amplifier.
The AGC amplifier consists of operational amplifier ZS.
The
amplified output from ZS is rectified by CR7 and filtered by CSS to
produce a de level to the AGC de amplifier.
This produces a
carrier derived AGC level in order to keep the envelope detector
operating in its optimum range.
In AM operation, CR6 is reverse
biased by -12 vdc at pin P,
thereby allowing normal operation of ZS.
In SSE operation, +12 vdc
at pin P clamps the output of ZS to +12 volts reverse biasing CR7
and, thereby, taking the carrier derived AGC voltage out of the
AGC loop.
4.2. 7
AM-FSK SELECTOR CIRCUIT
(Refer to Figure 6-3.)
The AM-FSK selector consists of AM-SSE switch S4 and signal
control diodes CR3 and CR4.
When the AM-SSE switch is in the SSE
position, S4 provides +12 vdc at P to forward bias CR4 and reverse
bias CR3.
This allows the signal from T4 to pass thru CR4 to the
bandwidth selector (i.e., 1 kHz or 3 kHz).
Since the +12 vdc blocks
CR3, the audio detector output is disabled.
In the AM position,
S4 applies -12 volts at P allowing the audio from the AM Detector
to pass thru CR3 while blocking CR4.
4.2.8
AUDIO BANDWIDTH SELECTOR CIRCUIT
(Refer to Figure 6-3.)
The audio bandwidth selector consists of 1 kHz-3kHz switch SS,
a 1 kHz band-pass filter, and a diode control circuit.
The 1 kHz-
4-8
Summary of Contents for lSOOB1500B
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