Flat Display Technology LP065GVAxx-FxR, User Manual

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FLAT DISPLAY TECHNOLOGY
■ LP065GVA xx - F x R V1.1
Copyright © 2011 FDT http:// www.fdt.com.tw , E-mail- fdt@fdt.com.tw
This technical specification is subject to change without notice .
18
7. Pin Description
7.1 J302
：
AUO LCD Panel I/O Terminals (20 Pin LVDS Connector Pitch 1.25mm Side Entry Type)
※
FDT Connector Part No.: MS240420G (STM) [Same as FI-SEB20P-HF13E (JAE)];
FDT Matching Connector Part No.: P240420 (STM) [Same as FI-S20S (JAE)].
Pin No Symbol I/O Description Remark
1 VDD I
Power supply, 3.3V (typical)
2 VDD I
Power supply, 3.3V (typical)
3 GND -
Ground
4 SEL68 I
Selection for either 6bit or 8bit LVDS input:
SEL68 =”Low” or “NC”, accepts 6bit LVDS data input;
SEL68 = ”High”, accepts 8bit LVDS data input.
5 RxIN1- I
Negative LVDS differential input (R0-R5, G0)
6 RxIN1+ I
Positive LVDS differential input (R0-R5, G0)
7 GND -
Ground
8 RxIN2- I
Negative LVDS differential input (G1-G5, B0-B1)
9 RxIN2+ I
Positive LVDS differential input (G1-G5, B0-B1)
10
GND -
Ground
11
RxIN3- I
Negative LVDS differential input (B2-B5, DE)
12
RxIN3+ I
Positive LVDS differential input (B2-B5, DE)
13
GND -
Ground
14
RxCLKIN- I
Negative LVDS differential clock input
15
I
Positive LVDS differential clock input
16 GND -
Ground
17 U/D I
Vertical Reverse (“Low” or NC: Normal, “High”: Reverse)
18 R/L I
Horizontal Reverse (“Low” or NC: Normal, “High”: Reverse)
19 RxIN4- I
Negative LVDS differential input (R6-R7, G6-G7, B6-B7)
NC for 6bit LVDS input.
20 RxIN4+ I
RxIN4+ Positive LVDS differential input (R6-R7, G6-G7, B6-B7)
NC for 6bit LVDS input
Note: “Low” stands for 0V. “High” stands for 3.3V. “NC” stands for ”No Connection”.